This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DRV8873: What is suggested handling of ITRIP fault?

Part Number: DRV8873

The datasheet is not clear on whether nFAULT is asserted when ITRIP is activated. In software version of a chip it is possible to disable reporting via ITRIP_REP. I am assuming that in hardware version the nFAULT is always reported if ITRIP is enabled.

I hope I am wrong here, because this behavior does not make much sense to me. What are we supposed to do with it? Reduce PWM duty cycle? But that is exactly what the chip is already doing for us. Stop the motor completely? Why would we do it if current regulation can prevent over-current from happening?

On the other hand, if we disable current regulation to avoid nFAULT on ITRIP, we may increase the chances of reaching OCP limit.

So, does enabled ITRIP current regulation report nFAULT in HW version? And if it does, what is the suggested handling of it? Especially since we cannot distinguish this not-really-a-fault from all other important faults.