I am evaluating the DRV8873S (SPI version). I plan to take advantage of the ITRIP current regulation feature. I will only have a periodic SPI interaction with the device (approx 10Hz), plus PWM outputs to IN1/IN2. Each loop, I will read the FAULT and DIAG Status registers. I would like to know if current regulation has recently occurred with the motor. I see there are bits in the DIAG Status register for ITRIP1 and ITRIP2. I cannot determine from the datasheet how long these status bits stay active if current regulation takes place. If they immediately reset to 0 after the TOFF (20-80us) time, then I don't understand the usefulness of these bits unless I can guarantee an SPI access to the part within that window! If these bits are latched until CLR_FLT, then that would be great. But I can't find any details on this.
My plan is to have the ITRIP feature latch the FAULT bit (ITRIP_REP=1). Then when I read the FAULT bit as 1, then I will assume it is the ITRIP feature by process of elimination, if no other FAULT Status bits are set.
Since I cannot SPI within ~20-80us of nFAULT going low, is this the only way to know that ITRIP occurred?
Thank you.
