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UCC21222: Can output A and B channels be powered from a single supply (common +12V and GND)?

Vlad Blanshey
Intellectual 700 points
Part Number: UCC21222

Hello, I am using UCC21222D gate driver to run a half bridge where the high side A is based on P-Channel MOSFET (after inverting A output)  and low side B using N-Channel MOSFET so both high and low sides are referenced to the same ground. Only inputs from MCU controller are isolated but not outputs.

Is it OK to join VDDA and VDDB to +12V rail, and join VSSA and VSSB to the non-isolated common GND ?

  • 0
    TI__Expert 4065 points

    Hi Vlad,

    I don't quite understand how you will avoid shorting the mosfets this way. Could you draw a sketch of how you plan to make these connections? Alternatively you can test your design using one of our spice models linked here: https://www.ti.com/product/UCC21222

    Regards,

    Krystian

  • 0
    Intellectual 700 points

    Hi, Krystian , our H-Bridge design is based on the circuit attach here based on P-Channel mosfets for the high side. It is taken from this app. note https://www.infineon.com/dgdl/Infineon-P-channel_MOSFETs_for_switching_applications_selection-AN-v01_00-EN.pdf?fileId=db3a304341e0aed001420380cc13101b

    We already had this arrangement running well  in our previous prototype which used the  L6498D half bridge driver from STM but we want to replace it with UCC21222 to benefit from the Isolated inputs and also to use deadtime insertion.

    Our High and Low side MOSFET's gates are driven directly from the A and B outputs of UCC21222 . As you can see both high and low side mosfets are referenced to the same ground (this is the advantage of using P-Channel for the high side).

    Again, the question is whether UCC21222 allows joining power rails of both output channels.

    https://photos.app.goo.gl/VvXDA6VqNMHYJwuz5

  • 0 in reply to Krystian Plaskota
    Intellectual 700 points

    Apparently I clicked on "reply" to my original message instead of yours, sorry Slight smile

    I  decided to seek help here because we got our new H-Bridge burned  in first power-up. All p-n channels of the mosfets burned through , resistance 0 between all pins! (Never had such case before). Checking everything the only "novelty" compared to the previous working prototype is usage of UCC21222 (all the MOSFETs circuits are the same as before)

    Unlike L6498D  , the UCC21222 from TI has independent isolated rails for both output channels, and this made me think whether joining both output power rails are legitimate with this chip even though datasheet does not show anything against such usage.

  • 0 in reply to Vlad Blanshey
    TI__Expert 4065 points

    Hi Vlad,

    I am still looking into this and I will update my message with my feedback soon.

    Edit, 

    Technically the 2 channels of the UCC21222 can be powered from one supply, there isn't an issue with doing that. However typically in a half bridge, the low side FET terminals are between VSSB and VSSA, so you can see the issue with connecting VSSA and VSSB together would cause the lowside FET to be shorted. In the appnote you linked, the halfbridge is indeed different and might resolve this senario. There is nothing innately wrong with connecting both channels to 1 supply as long as you endure it doesn't lead to a short in the halfbridge. I think it would be better if I could see the schematic. But based on what I see, it looks like this could work.

    Regards

    Krystian

  • 0 in reply to Krystian Plaskota
    Intellectual 700 points

    Hi Krystian,

    here is a picture of a fragment of schematic depicting a half bridge:

    https://photos.app.goo.gl/BppzhATudpymqwFB9

    as you can see the outputs A and B are separated from the common ground by 20 kOhm total.

    So you confirm that this is a correct way to use UCC21222 driver?

    Also please confirm that the DT setup here will surely prevent from the shoot-through if INA and INB unintentionally overlap.

    If you confirm both statements that means our misfortune of blowing the MOSFETs caused not by this chip but by something else.

    Thank you,

    Vlad

  • +1 in reply to Vlad Blanshey
    TI__Expert 4065 points

    Hi Vlad,

    Thanks for the schematic, I am reviewing it now and will update my post with feedback by end of today.

    Edit:

    I looked at your schematic, that should be perfectly fine to do in theory. However I would still advise against doing this because there are more efficient ways to use a single supply to drive both channels which allows you greater control over the switching of your fets. In your schematic the highside fet is being controlled indirectly by another fet and this could be problematic since you have less control of how fast you can switch off that fet and you are adding an additional delay by switching the pull down fet. It's possible that misalignment of the switching caused by this configuration could induce shoot-through and cause damage which you have to account for in your dead time setting. There is also going to be increased losses in this configuration due to the PMOS and additional leakage current paths. 

    I suggest using a bootstrapped supply instead, its much more efficient, costs less, and gives you more control over the switching. We have documentation for how that works here:

    https://www.ti.com/lit/an/slua887/slua887.pdf

    There are some additional considerations when using the bootstrap configuration layed out here:

    https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/927826/faq-ucc21520-faq-what-do-i-need-to-know-about-dv-dt-when-designing-a-driver-bootstrap-supply

    Here is a calculator tool for bootstrap design:

    https://www.ti.com/lit/zip/sluraz5

    Regards,

    Krystian

  • 0 in reply to Krystian Plaskota
    Intellectual 700 points

    Thank you Krystian, I got from you lots of useful info. Indeed I need to watch the delay of the transition to ON by high side MOSFET introduced by the inverting fet and take it into calculation of deadtime (in addition to my deadtime delay generated in firmware).

    Your suggestion to use bootstrap supply is not applicable to our project though. I started the development from this appoarch because the most TI manufactured gate drivers assume such approach and most app noted from TI also relate to only this approach but my design does not use PWM which is essential for the use of N-Channel high side mosfet design. If PWM were applicable for our project I'd choose one of many closely related TI offerings specifically for such gate drivers.

    As of now my digging into the cause of the recent mosfet' blow points to the faulty batch of P-Channel mosfets (happened to be a batch of clones from China, not originals from mouser which we used in the previous prototype). These mosfets blew in other module too  unrelated to the H-Bridge. Problem looks like nothing to do with UCC21222 .

    Looks like UCC21222 is a dream-come-true for any project where control of H-Bridge is not based on PWM and we are lucky that these chips are still available :))

    Again thank you,

    Vlad