UC3525A: When I used UC3525 as a push-pull converter and adopted full bridge rectification output, I encountered some problems

Hi,

Can you circle the high frequency area in your Fig 4 to indicate where the high frequency noise is?

Figure 4 shows the waveform of 24OUT (without load), which occurs when Q1 is switched on and off at 20KHZ

Figure 5 shows a brief schematic diagram of the entire system

Figure 5

Hi,

Can you capture the waveform at the right of L3 with Q1 removed (Fig 2)?

The VO output is very stable, but there are small ripples。After adding a resistor to the 24OUT output, the waveform is OK. The 24OUT waveform is shown in Figure 6. Why can resistors eliminate this interference? Thank you!

  Figure 6

Hi，

Hi,

Where did you add the resistor to the 24VOUT in your circuit? 

Where is C35 in your circuit?

C35 in Figure 1

add the resistor to the 24VOUT to eliminate interference on 24V

Hi,

please show how you added the resistor to 24VOUT, between 24VOUT to where?

There is high-frequency interference waveform on 24OUT, as shown in Figure 4，so I try to  added the resistor to between 24VOUT and GND 

Why does removing C35 affect the voltage waveform of pin 2 (EA+) of UC3525 and add the resistor to the 24VOUT to eliminate interference on 24V?

24OUT with resistance as shown in Figure 7

                                  Figure 7

When removing C35, there are spikes in voltage at EA+and the VDS waveforms of Q10 and Q13 are chaotic, resulting in stable VO output but low efficiency of the push-pull inverter. Why is this?

Hi,

Please capture the waveform of OUTA and OUTB to check the difference before and after removing C35 to see any clue.

the waveform of OUTA and OUTB(Figure 8)

                         Figure 8

 the VDS waveforms of Q10 and Q13(Figure 9)

                             Figure 9

Hi,

Please label each waveform and also indicate which one with C35 which one not.

Hi，

Figures 8 and 9 show the waveform without C35

Figure 8 shows the waveforms output by OUTA and OUTB of UC3525, namely the two VGS waveforms of a full bridge MOS transistor

Figure 9 shows the two VDS waveforms of a full bridge MOS transistor

Add C35, along with the VDS waveform on this link e2e.ti.com/.../uc3525a-when-i-used-uc3525-as-a-push-pull-converter-and-adopted-full-bridge-rectification-output-i-encountered-some-problems The waveform of Figure 1

Thank you!

Hi,

Can you copy the waveform to this thread after add C35? The link you mentioned does not show clearly Fig 1.

Figure 11 shows the waveform of a single VDS channel

When the load of a push-pull converter is an inductive load, what is the requirement for the output VO and GND of the push-pull converter to have parallel directional diodes? The reverse diode is not shown in the diagram

thank you

Figure 11

Hi,

Thsi ia a perfect answer！

Are there any books, or papers that mention inductive loads (capacitive loads)? Precautions for flyback power supplies, forward power supplies, and push-pull power supplies, such as adding anti parallel an diode , etc. Thank you!

The new project adopts the same push-pull converter circuit, with the target voltage VO outputting DC350V (i.e. only changing the resistance value of R96 in Figure 1 to 1.12K)

At first, the T2 turn ratio of the transformer was 3:3:52, which was particularly inefficient. The VGD waveform was similar to the waveform without C35, resulting in a 70% decrease in overall efficiency. However, changing the transformer turn ratio to 5:5:80 resulted in a VDS waveform that was almost identical to the waveform with C35, and the overall efficiency reached 92%

That is to say, the entire project only improves the efficiency by changing the number of transformer turns. What is the impact of the transformer turn ratio on the efficiency of push-pull converters? The entire process C35 was not removed

Thank you!

Hi,

May I ask how to search for unstable factors? What factors cause instability in push-pull converters (which can be stabilized by simply replacing the transformer)?

Thank you

If PWM and ADC from TMS320F28035 are used as push-pull converters, and there is no error amplifier similar to UC3525, does the push-pull output VO still require a compensation circuit? What compensation algorithm is used in the program? Thank you!

Thank you

Sorry, I couldn't find any articles on loop compensation for push-pull converters. Can you recommend some articles on loop compensation for push-pull converters?

Thank you!

What specific examples are there regarding the application of firmware design?

Currently, we only see this example of TIDM_ BUCKBOOST_ What are the main aspects of loop compensation for BIDIR digital power supplies? Is the frequency of PWM or something else?

HiHong Huang,

New problems encountered after the output voltage of the push-pull converter changed

When the sum of R96 and R97 in Figure 12 decreases from 1K to 820 ohms, while other parameters remain unchanged, the MOS transistors (Q10, Q13, Q14, Q15) will be damaged. Why is this? When the output voltage Vo rises from over 400 volts to over 500 volts, this problem occurs. The load is a resistance of 2K 。The PWM frequency of push-pull is 15K。There will be no problem when the output voltage is low（about below 500V）

May I ask if this is a problem with the transformer or the loop compensation circuit?

Thank you!

Hi,Hong Huang

At present, it is suspected that the transformer parameters are causing excessive MOS transistor current, leading to MOS transistor breakdown. What parameters of the transformer will affect MOS transistor current?

Hi，

The transformer has been replaced, but it still cannot be replaced. May I ask which parameters of a transformer have an impact on the transformer?

Thank you!

Hi,

I am not understanding your message. It sounds like you swapped the transformers and you confirmed the transformer is the reason to have the bad operation, right? Then you want to know what transformer parameter can cause that bad operation, right?

Yes, today's open-loop test will explode if powered on