BQ25756: BQ25756 In reverse mode, the output voltage (VAC) cannot be adjusted above 4V.

Hi Star,

Can you provide all of the status and flag registers showing IAC_DPM_STAT?  Is there a load on the input when in reverse load?

Regards,

Jeff

Hi Jeff,

I'm the one with the problem.

There is no load on the input when in reverse load.

The Status register as follows:

When VSYS_REV is set to 4000mV:

When VSYS_REV is set above 5000mV，such as 5500mV:

Thanks

Yonggang

Hi Yonggang,

How much capacitance is out ACP and ACN? What are the voltages at ACN and ACP pins, in other words across the 5mohm resistor, when the IAC_REV flag is set?

Regards,

Jeff

Hi Jeff,

A 470nF capacitor is placed between ACP and ACN. See the attachment for detailed schematic design.

BQ25756.pdf

There is no voltage difference at ACN and ACP pins when the IAC_REV flag is set.  When VSYS_REV is set above 5500mV, the voltage measured on both the ACN and ACP pins is 4.134V. And the sampling result of IAC_ADC is 0.

Thanks

Yonggang

Hi Yonggang,

I do not see this issue on the bench.  Ethan is primary support on this device and is back tomorrow.  He should be able to respond then.

Regards,

Jeff