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LM3880-Q1: About the sequence of LM3880-Q1(Use LM3880-Q1 in cascade)

Part Number: LM3880-Q1
Other Parts Discussed in Thread: LM3880

Customers use the LM3880-Q1 in cascade.
*For the circuit configuration, refer to the attached file "circuit diagram".

When EN changes like attached file,
1)LM3880-Q1 Sequence-1
2)LM3880-Q1 Sequence-2

Which is the correct Sequence?
If both are wrong, please tell me the correct Sequence.

A cycle of 120ms is shown in Figure 15 of the LM3880-Q1 data sheet.
Is the power up/down sequence affected even if EN changed during this 120 ms cycle?


About LM3880-Q1 Sequence.pdf

  • Hello
    Could you please check this post?
  • yihe-san,

    Thank you for your reply.

    I understood about Q2 as follows.
    The EN assertion(even if it is just glitch) is not accepted at between 120ms period and there are no reset operation.
    I am satisfied with this answer.

    For Q1, which of the LM3880-Q1 Sequence-1 and LM3880-Q1 Sequence-2 is the correct behavior?

    I expect the answer of Q1.


  • EN of LM3880 provides glitch free operation. so it is up to the duration of the 2nd high pulse after EN is de-asserted.
    In your char, you list the duration as td or more which will not give a unique answer.

    if the duration is less than 2xtd + 120ms, sequence-2 is right other wise sequencer-1 is correct.

    Hope this helps.