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LM5175-Q1: Voltage Regulation at DCM transient

Part Number: LM5175-Q1
Other Parts Discussed in Thread: LM5176-Q1, , LM5175, LM5176

Hi,

I am designing a system with input of 8 V to 18 V, output of 17 V at 8.5 A.

I was originally using the LM5176-Q1 for the design, but later switched to the LM5175-Q1 to take advantage of the DCM mode as I worried that reverse current in CCM no load/light load condition will cause a problem. I had a LM74700QDBVRQ1 before the buck-boost stage and I worried that the reverse current will cause the system to shut down.

1.

I am running some PSPICE simulation on the LM5175-Q1 with a load transient of 0 A to 8.5 A at 1 us rise/fall time time at stable output voltage of 17 V. The simulation runs fine at CCM mode but I see that the voltage regulation is not too good at DCM. I see the regulated voltage drops several volts during this transient. Is this limitation real or this is not supposed to happen? Part of my compensation design problem or simulation setup not right?

2. 
Is my concern about reverse current in CCM shutting down the LM74700 reasonable? I did some research and simulations and confirmed there is definitely reverse current back to the input source in CCM, but a lot of people have been designing in CCM and didn't have to worry about this problem?

3. 

Any recommendations?

Thanks,

Peng

  • Hi,

    This is the waveform with MODE pin straight to GND.

    LM5175 simulation_DCM.docx

    "VOSNS +" = VOUT
    I(I1) = IOUT
    I(L1:IN) is inductor current.

    Seems like the switching is too slow to catch up. I noticed that Webench doesn't allow DCM simulation of this part as well? Is this somehow related to each other?

    Thanks for your help,

    Peng

  • Hi Pengzhao,

    Thank you for reaching our and for using our LM5175/76.  Actually there are many designs using both the LM5176 and LM74700.   The CCM or FPWM mode of the LM5176 at not load should not produce negative current back to VIN. The average inductor current, or the average input current, will both be positive even there is no load. 

    If you continue the use of the LM5175, please refer to the design calculator to make sure your loop compensation is set up properly.  The loop gain at DCM does change, so you may need to pay attention to alter the load condition in the calculator, to make sure the selected compensation still maintains stability.  

    https://www.ti.com/tool/LM5175QUICKSTART-CALC

    I would recommend you to change to LM5176.  The CCM keep the loop gain almost independent of the load, simplifying your loop compensation effort. 

    Thanks,

    Youhao Xi, BCS Applications Engineering

  • Hi Youhao,

    I went back and looked at it a little bit more, but this time a simulation with the LM74700 and LM5176 together. In the simulation, the FET controlled by the LM74700 is actually off during no load condition (VGS ~~ 0). I didn't quite understand the simulation, but I think that in reality, the body diode of the LM74700 controlled FETs, the input caps, and the remaining energy in the circuit will keep everything running at no load during the short negative current bursts.  And as you said, the average input current should be positive. The LM74700 also mentioned "no DC reverse current" instead of just no reverse current.

    How much would you agree with these statements?

    I am planning to go with your suggestion of using the LM5176-Q1. Hearing from an expert with experience like you and the fact that many designs were done before using the LM74700 and LM5176-Q1 definitely helps.

    However, for the sake of my own understanding, can you explain your two earlier statements a little bit more?

    1. The average input current is always positive because there are extra energy needed to keep the circuit running and small losses associated with the components. Is this correct?

    2. Why is the average inductor current positive? I thought it will be roughly zero for average inductor current.

    Thanks,

    Peng

  • The LM74700 has a response time in a scale of some mircro second to block negative current.  It is usually placed at the front end of the converter, and there a lot of capacitors after the smart diode device, so, it will not see any negative switching current from the dc-dc converter switching stage. During normal operation, the LM74700 does see dc current.

    Please read the LM74700 datasheet.  It controls the FET by observing the Vds.  If the current becomes very low, it triggers zero cross threshold, this is why you may see it turns off the FET. It is doing what is supposed to do. 

    To answer your other two questions:

    1. Even you have no load, the circuit still consume some power. For instance, the FB resistor divider leaks current from the VOUT rail to GND. So, there is alway positive power consumed by the output rail, and hence your averaged inductor current cannot be 0 or <0.

    2. See my answer in 1. 

    Thanks,

    Youhao

  • The LM74700 has a response time in a scale of some mircro second to block negative current.  It is usually placed at the front end of the converter, and there a lot of capacitors after the smart diode device, so, it will not see any negative switching current from the dc-dc converter switching stage. During normal operation, the LM74700 does see dc current.

    Please read the LM74700 datasheet.  It controls the FET by observing the Vds.  If the current becomes very low, it triggers zero cross threshold, this is why you may see it turns off the FET. It is doing what is supposed to do. 

    To answer your other two questions:

    1. Even you have no load, the circuit still consume some power. For instance, the FB resistor divider leaks current from the VOUT rail to GND. So, there is always positive power consumed by the output rail, and hence your averaged inductor current cannot be 0 or <0.

    2. See my answer in 1. 

    Thanks,

    Youhao

  • Hi Youhai,

    Thanks for the detailed explanations.

    Peng