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LM25119: Power hold after cutoff

Part Number: LM25119

Late cycle requirements change specifies 300 mS hold up time for processor after converter shut down. I have included the schematic of the power section.

Can you provide any best practice options for extending the power hold up time for the processor that runs of the 3.3V & 1.35V rails.

PowerSection.pdf

  • Hello,

    What drives the hold-up requirement from the processor side? If you disable the LM25119, converter stops switching, and the only way to provide hold-up is extra output capacitance. Most commonly the hold-up requirement would be addressed on the input voltage (higher voltage) side, to reduce the amount of capacitance required. Example, if you have AC to 12V supply, then 12V to Vcore. The hold-up requirement would get addressed on the AC to 12V side. 

  • HI,

    My thoughts as well. The correct solution is an external UPS.

    Embedded Linux these days is very slow responding to external interrupts. The possibility of file corruption as the unit goes down is driving the hold up requirement on the processor side.

    I have tried several passive component solution (input & output sides)  but have run into stability issues with the LM25119s. The amount of bulk capacitance required to get mS of hold time raises the ESR in the current loops too much. The stability issues are seen at power up...but then settle down. I don't want to release the product with that kind of problem.

    The power supply schematic section I sent you works very well in all other respects (efficiency, stability, emissions, etc).

    I am trying to check all the boxes I can try with respect to hold time experiments.  I reached out to you guys to see if you had any other thoughts regarding passive type solutions.

    Any more thoughts?

  • Hi Peter, Sorry for the late reply. 

    Can you share a waveform of the oscillation you saw at power-on with LM25119? I am wondering if it would help to add a series resistor with the SS cap to add a voltage offset during the ramp up. 

     

  • Hi Matt,

    The design has several voltage domains that create additional problems when sustaining just 1 or 2 voltages around the processor. Currents bleeding into the non-sustained domains heighten the risk of component damage at power down.

    I appreciate your suggestion as I suspect it may help alleviate the startup oscillation induced by the sustaining capacitors. I have decided to go with the UPS approach since the majority of our installations have that capability.

    Thank you for the assistance.

    peter