[FAQ] AM6442, AM6441, AM6422, AM6421, AM6412, AM6411 Custom board hardware design – Queries regarding Crystal selection

Lavanya M R

Intellectual 1580 points

Part Number: AM6442
Other Parts Discussed in Thread: TMDS64EVM

Hi TI Experts,

I have the below queries regarding the crystal selection.

Recommended crystal frequency for MCU_OSC0
Do you have recommended part numbers for Crystal?
Can you help check if NX2016SA-25MHZ-EXS00A-CS10694, CRYSTAL 25.0000MHZ 8PF SMD could be used?
Do you have recommendations for MCU_OSC0 crystal selection.
Could you share the crystal part number used on the EVM?
Can i use an oscillator as the clock source?
Is there a real max value for crystal ESR?
Is there some guidelines for the crystal circuit layout?
Is there a delay requirement for the MCU_PORz after all the power supplies ramp and does the delay depend on the clock source

Let me know your thoughts.

over 1 year ago

+1 Lavanya M R over 1 year ago

TI__Intellectual 1580 points

Hi Board designers,

Refer below inputs for the queries related to the MCU_OSC0 crystal selection.

1.Recommended crystal frequency for MCU_OSC0

Recommended Crystal Parallel Resonance Frequency for MCU_OSC0 is 25 MHz

2. Do you have recommended part numbers for Crystal?

"Note that we do not provide part number recommendations."

The system requirements of a customer’s product need to be considered when selecting a crystal. We do not know the operating conditions or frequency tolerance of all attached devices within their system. The crystal requirements defined in our datasheet only address the processor requirements, but the crystal characteristics may also influence clocks that are sourced to attached devices which have their own requirements. In some cases, the attached devices may have frequency requirements that are tighter than the processor frequency requirements.

3. Can you help check below specs and confirm this crystal specifications meets the requirements for the MCU_OSC0 Internal Oscillator Clock Source.

The device expert and oscillator designer reviewed the crystal requirements and agree this crystal specifications meets the requirements for the HF oscillator implemented on our AM64x, AM62x and AM62Ax Sitara processors.

4. Do you have recommendations for MCU_OSC0 crystal selection.

Refer below sections of the device specific datasheet.

AM64x Sitara Processors datasheet (Rev. E) (ti.com)

Figure 7-17. MCU_OSC0 Crystal Implementation

The crystal must be in the fundamental mode of operation and parallel resonant.

Table 7-17. MCU_OSC0 Crystal Circuit Requirements summarizes the required electrical constraints.

5. Could you share the crystal part number used on the EVM?

TMDS64EVM

ABM10W-25.0000MHZ-8-K1Z-T3

25 MHz ±10ppm Crystal 8pF 50 Ohms 4-SMD, No Lead

Do consider parasitic capacitance introduced by the PCB when determining the crystal load cap value.

6. Can I use an oscillator as the clock source?

Refer 7.10.4.1.2 MCU_OSC0 LVCMOS Digital Clock Source of the device-specific data sheet. Follow the recommended XO termination.

7. Is there a real max value for crystal ESR?

The maximum ESR recommended is 50 ohms regardless of shunt capacitance.

8. Is there some guidelines for the crystal circuit layout?

Refer 9.3 Clock Routing Guidelines, 9.3.1 Oscillator Routing section of the device-specific data sheet.

9. Is there a delay requirement for the MCU_PORz after all the power supplies ramp and does the delay depend on the clock source?

Refer to MCU_PORz Timing Requirements in the device-specific data sheet

RST1 Hold time, MCU_PORz active (low) at Power-up after supplies valid (using external crystal circuit) is 9500000 ns
RST2 Hold time, MCU_PORz active (low) at Power-up after supplies valid and external clock stable (using external LVCMOS clock source) 1200 ns (This does not include the external oscillator start-up time)

Regards,

Lavanya M R.

0 Kallikuppa Sreenivasa 9 months ago in reply to Lavanya M R

TI__Guru**** 160589 points

Hi TI Experts,

I have the below additional queries regarding the crystal selection.

10. MCU_OSC0_XI/MCU_OSC0_OUT starts before VDD_CORE voltage ramps up, is this a concern
11. Does it have any side effect when MCU_OSC0_XI clock starts before VDD_CORE voltage ramps up? What kind of conditions let MCU_OSC0_XI doesn't start until after VDD_CORE is applied?
12. It is assumed that when a crystal connected externally has a large change in frequency due to some factor, there will be an effect on the PLL.
13. Does the 25MHz XTAL has an oscillation margin switching function and is there need to configure registers.
14. Do you have some recommendations on the crystal load and load capacitance matching

Let me know your thoughts.

0 Kallikuppa Sreenivasa 9 months ago in reply to Kallikuppa Sreenivasa

TI__Guru**** 160589 points

Hi Board designers,

Refer below inputs for the queries related to the MCU_OSC0 crystal selection.

10. MCU_OSC0_XI/MCU_OSC0_OUT starts before VDD_CORE voltage ramps up, is this a concern

The oscillator is working as expected. It most cases the oscillation will start shortly after its 1.8V power rail is applied, but there may be conditions where it doesn't start until after VDD_CORE is applied.

11. Does it have any side effect when MCU_OSC0_XI clock starts before VDD_CORE voltage ramps up? What kind of conditions let MCU_OSC0_XI doesn't start until after VDD_CORE is applied?

No side effects.

The oscillator has registers in the VDD_CORE power domain that controls some of its operating functions. It is very unlikely the start-up will be delayed until VDD_CORE is valid, but we are being conservative by saying the oscillation will not begin until VDD_CORE is valid to ensure the product designer provides adequate time for the oscillator to start before reset is released.

12. It is assumed that when a crystal connected externally has a large change in frequency due to some factor, there will be an effect on the PLL.

I would like to know the effect on the PLL when the frequency changes and how each function will operate. The factors that may cause the frequency to change include initial failure, environment, and manufacturing defects.

Ans: It is not possible for crystals to have a large change in frequency. They have a very high-Q impedance response. The impedance drops dramatically with a very small shift in frequency, which would cause the gain in the oscillator feedback path to drop such that it is not possible to maintain oscillation. So, they are either oscillating at their designed frequency are not oscillating.

13. Does the 25MHz XTAL has an oscillation margin switching function and is there need to configure registers.

No HFOSC0 registers are required to be changed. These registers should remain in their default state.
Select the appropriate crystal circuit components that are compliant to the values defined in the MCU_OSC0 Crystal Circuit Requirements table.
Read the Load Capacitance and Shunt Capacitance sections to select the appropriate crystal circuit components.

14. Do you have some recommendations on the crystal load and load capacitance matching

It is recommended to match the crystal load and the load capacitance as per the data sheet recommendations. Any difference in the crystal load and the load cap capacitance selected could result in PPM variation of the clock frequency Choose crystal load as per the standard capacitance availability to ensure matching of the capacitance.

References

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1115457/am6411-is-it-needed-to-input-the-synchronized-clock-between-am64x-and-ethernet-phy

Regards,

Sreenivasa