DRA821U: MCAN send pending, no MCAN_INTR_SRC_TRANS_COMPLETE received(RTOS+QNX)

Sun Jianqiang

Part Number: DRA821U

Hi Experts,

I have ported CAN csl support and loopback_app from R5F to A72 which running QNX. The internal and external loopback works well, but the transmitting pended there when I send CAN message to a external connected transceiver. The following is the loopback mode log:

J7200-EVM@QNX:/# can-mgr -v -rl -e
conf: inst 0, domain 1, role 2, id 4, datalen 16, timeout(2000000,2000000)
D:buf alloc: virt/16649ea000 phy/8f6d2b000
D:enter __can_control, instance 0
D:gpio offset en:0x18 stb:0x18
D:enstb:activeL:set stb bit 7 to 80
D:en:activeH:set en bit 6 to c0
D:leave __can_control
D:enter __can_control, instance 0
D:gpio offset en:0x40 stb:0x18
D:enstb:activeL:set stb bit 29 to 24100000
D:en:activeH:set en bit 13 to 20802000
D:leave __can_control
l:enter canl_open
c:enter cancsl_open
c:phyaddr 2700000 mapped to 16649eb000
c:phyaddr 2701000 mapped to 16649ec000
c:phyaddr 2708000 mapped to 16649ed000
c:phyaddr 2a78000 mapped to 16649f5000
c:leave cancsl_open
l:enter canl_mcanRegisterIsr
l:int0 156 int1 157 itsint 158
l:Interrupt Configuration done.
l:leave canl_mcanRegisterIsr(0)
l:enter canl_mcanConfig
l:enter cancsl_getRevisionId
l:leave cancsl_getRevisionId
l:MCANSS Revision ID:
l:scheme:0x1
l:Business Unit:0x2
l:Module ID:0x8e0
l:RTL Revision:0xa
l:Major Revision:0x1
l:Custom Revision:0x0
l:Minor Revision:0x1
l:enter cancsl_isFDOpEnable
l:leave cancsl_isFDOpEnable
l:CAN-FD operation is enabled through E-Fuse.
l:enter cancsl_isMemInitDone
l:leave cancsl_isMemInitDone
l:Endianess Value: 0x87654321
l:enter cancsl_init
l:leave cancsl_init
l:enter cancsl_config
l:leave cancsl_config
l:enter cancsl_setExtIDAndMask
l:leave cancsl_setExtIDAndMask
l:external loopback enabled
l:enter canl_mcanConfig
l:enter canl_int_enable
l:leave canl_int_enable
l:leave canl_open
D:txbuf:
31 32 33 23 41 41 42 42 43 43 44 44 45 45 46 46 
l:t:Message ID: 0x100000
l:t:Message Remote Transmission Request: 0x0
l:t:Message Extended Frame ID(0:11Bit ID/1:29bit ID): 0x0
l:t:Message Error State Indicator(0:Error Active/1:Error Passive): 0x0
l:t:Message Data Length Code: 0xa
l:t:Message BRS: 0x1
l:t:Message CAN FD format: 0x1
l:t:Message Store Tx Events: 0x1
l:t:Message Marker: 0xaa
l:t:Message DataByte 0: 0x31
l:t:Message DataByte 1: 0x32
l:t:Message DataByte 2: 0x33
l:t:Message DataByte 3: 0x23
l:t:Message DataByte 4: 0x41
l:t:Message DataByte 5: 0x41
l:t:Message DataByte 6: 0x42
l:t:Message DataByte 7: 0x42
l:t:Message DataByte 8: 0x43
l:t:Message DataByte 9: 0x43
l:t:Message DataByte 10: 0x44
l:t:Message DataByte 11: 0x44
l:t:Message DataByte 12: 0x45
l:t:Message DataByte 13: 0x45
l:t:Message DataByte 14: 0x46
l:t:Message DataByte 15: 0x46
c:enter MCAN_writeMsg
c:leave MCAN_writeMsg
l:enter cancsl_txBufAddReq(1)
l:leave cancsl_txBufAddReq(0)
l:enter canl_mcanIntr0ISR
l:txcomplete posted(0)
l:rxcomplete posted(0)
l:t:blocking...done(2000000, 0)
l:leave canl_mcanIntr0ISR
l:r:blocking...done(0)
l:can_send success, payload Bytes:16
l:can_receive success, payload Bytes:16D:send success!
l:r:Message ID: 0x100008
l:r:Message Remote Transmission Request: 0x0

l:r:Message Extended Frame ID(0:11Bit ID/1:29bit ID): 0x0

l:r:Message Error State Indicator(0:Error Active/1:Error Passive): 0x0
l:r:Message TimeStamp: 0x0
l:r:Message Data Length Code: 0xa
l:r:Message BRS: 0x1
l:r:Message CAN FD format: 0x1
l:r:Message Filter Index: 0x0
l:r:Message Accept Non-matching Frame: 0x0
l:r:Message DataByte0: 0x31
l:r:Message DataByte1: 0x32
l:r:Message DataByte2: 0x33
l:r:Message DataByte3: 0x23
l:r:Message DataByte4: 0x41
l:r:Message DataByte5: 0x41
l:r:Message DataByte6: 0x42
l:r:Message DataByte7: 0x42
l:r:Message DataByte8: 0x43
l:r:Message DataByte9: 0x43
l:r:Message DataByte10: 0x44
l:r:Message DataByte11: 0x44
l:r:Message DataByte12: 0x45
l:r:Message DataByte13: 0x45
l:r:Message DataByte14: 0x46
l:r:Message DataByte15: 0x46
D:rxbuf(16):
31 32 33 23 41 41 42 42 43 43 44 44 45 45 46 46 
D:enter __can_control, instance 0
D:gpio offset en:0x18 stb:0x18
D:disstb:activeL:set stb bit 7 to 40
D:dis:activeH:set en bit 6 to 0
D:leave __can_control
D:enter __can_control, instance 0
D:gpio offset en:0x40 stb:0x18
D:disstb:activeL:set stb bit 29 to 4100000
D:dis:activeH:set en bit 13 to 20800000
D:leave __can_control
l:enter canl_close
l:leave canl_close

The following is the tx log:

J7200-EVM@QNX:/# can-mgr -v -rt
conf: inst 0, domain 1, role 0, id 4, datalen 16, timeout(2000000,2000000)
D:buf alloc: virt/4bed13d000 phy/8f6cf0000
D:enter __can_control, instance 0
D:gpio offset en:0x18 stb:0x18
D:enstb:activeL:set stb bit 7 to 80
D:en:activeH:set en bit 6 to c0
D:leave __can_control
D:enter __can_control, instance 0
D:gpio offset en:0x40 stb:0x18
D:enstb:activeL:set stb bit 29 to 24100000
D:en:activeH:set en bit 13 to 20802000
D:leave __can_control
l:enter canl_open
c:enter cancsl_open
c:phyaddr 2700000 mapped to 4bed13e000
c:phyaddr 2701000 mapped to 4bed13f000
c:phyaddr 2708000 mapped to 4bed140000
c:phyaddr 2a78000 mapped to 4bed148000
c:leave cancsl_open
l:enter canl_mcanRegisterIsr
l:int0 156 int1 157 itsint 158
l:Interrupt Configuration done.
l:leave canl_mcanRegisterIsr(0)
l:enter canl_mcanConfig
l:enter cancsl_getRevisionId
l:leave cancsl_getRevisionId
l:MCANSS Revision ID:
l:scheme:0x1
l:Business Unit:0x2
l:Module ID:0x8e0
l:RTL Revision:0xa
l:Major Revision:0x1
l:Custom Revision:0x0
l:Minor Revision:0x1
l:enter cancsl_isFDOpEnable
l:leave cancsl_isFDOpEnable
l:CAN-FD operation is enabled through E-Fuse.
l:enter cancsl_isMemInitDone
l:leave cancsl_isMemInitDone
l:Endianess Value: 0x87654321
l:enter cancsl_init
l:leave cancsl_init
l:enter cancsl_config
l:leave cancsl_config
l:enter cancsl_setExtIDAndMask
l:leave cancsl_setExtIDAndMask
l:exit loopback mode
l:enter canl_mcanConfig
l:enter canl_int_enable
l:leave canl_int_enable
l:leave canl_open
D:txbuf:
31 32 33 23 41 41 42 42 43 43 44 44 45 45 46 46 
l:t:Message ID: 0x100000
l:t:Message Remote Transmission Request: 0x0
l:t:Message Extended Frame ID(0:11Bit ID/1:29bit ID): 0x0
l:t:Message Error State Indicator(0:Error Active/1:Error Passive): 0x0
l:t:Message Data Length Code: 0xa
l:t:Message BRS: 0x1
l:t:Message CAN FD format: 0x1
l:t:Message Store Tx Events: 0x1
l:t:Message Marker: 0xaa
l:t:Message DataByte 0: 0x31
l:t:Message DataByte 1: 0x32
l:t:Message DataByte 2: 0x33
l:t:Message DataByte 3: 0x23
l:t:Message DataByte 4: 0x41
l:t:Message DataByte 5: 0x41
l:t:Message DataByte 6: 0x42
l:t:Message DataByte 7: 0x42
l:t:Message DataByte 8: 0x43
l:t:Message DataByte 9: 0x43
l:t:Message DataByte 10: 0x44
l:t:Message DataByte 11: 0x44
l:t:Message DataByte 12: 0x45
l:t:Message DataByte 13: 0x45
l:t:Message DataByte 14: 0x46
l:t:Message DataByte 15: 0x46
c:enter MCAN_writeMsg
c:leave MCAN_writeMsg
l:enter cancsl_txBufAddReq(1)
l:leave cancsl_txBufAddReq(0)

*************************************************
l:t:blocking...done(2000000, -2)
D:send failed!

The tx-complelete interrupt never happens!
The following is the code I changed:

static void canl_mcanIntr0ISR(uintptr_t arg)
{    
    uint32_t intrStatus;
    canl_handle_t *hdl = (canl_handle_t *)arg;
    cancsl_handle_t *cslhdl = &hdl->cslhdl;
    
    trace_me("l:enter %s\n", __func__);
        
    intrStatus = cancsl_getIntrStatus(cslhdl);
    cancsl_clearIntrStatus(cslhdl, intrStatus);
    if (MCAN_INTR_SRC_TRANS_COMPLETE ==
        (intrStatus & MCAN_INTR_SRC_TRANS_COMPLETE)) {
        trace_me("l:txcomplete posted(0)\n");
        canl_osalPostLock(hdl->txcomplete);
    }   
    
    if (MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG ==
        (intrStatus & MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG)) {
        canl_osalPostLock(hdl->rxcomplete);
        trace_me("l:rxcomplete posted(0)\n");
    }   
    trace_me("l:leave %s\n", __func__);
}        

int canl_send(canl_handle_t *hdl, MCAN_TxBufElement *txmsg)
{
    ......
    /* Wait write to complete */
    semStatus = canl_osalPendLock(hdl->txcomplete, hdl->txtimeout);
    trace_me("l:t:blocking...done(%d, %d)\n", hdl->txtimeout, semStatus);
    if (semStatus == SemaphoreP_TIMEOUT) {
        return -ETIMEDOUT;
    }
    ......
}
*************************************************



D:check signal now, press any key to stop!

D:enter __can_control, instance 0
D:gpio offset en:0x18 stb:0x18
D:disstb:activeL:set stb bit 7 to 40
D:dis:activeH:set en bit 6 to 0
D:leave __can_control
D:enter __can_control, instance 0
D:gpio offset en:0x40 stb:0x18
D:disstb:activeL:set stb bit 29 to 4100000
D:dis:activeH:set en bit 13 to 20800000
D:leave __can_control
l:enter canl_close
l:leave canl_close

The following are the registers I dumped when tx-pending happens:

MCAN_CCCR:
devmem2 0x2701018 w
Value at address 0x2701018 (5ad15a4018): 0x340

MCAN_TXBRP:
devmem2 0x27010cc w
Value at address 0x27010CC (57485270cc): 0x2

MCAN_TXBTO:
devmem2 0x27010d8 w
Value at address 0x27010D8 (27a5ae60d8): 0x0

MCAN_TXBCF
devmem2 0x27010dc w
Value at address 0x27010DC (5d63a1e0dc): 0x0

MCAN_TOCC
devmem2 0x2701028 w
Value at address 0x2701028 (20cfdc0028): 0xFFFF0000

MCAN_PSR
devmem2 0x2701044 w
Value at address 0x2701044 (1a44866044): 0x707

MCAN_IR:
devmem2 0x2701050 w
Value at address 0x2701050 (1f5e711050): 0x0

MCAN_TXESC
devmem2 0x27010c8 w
Value at address 0x27010C8 (12edd420c8): 0x7

MCAN_TXFQS
devmem2 0x27010c4 w
Value at address 0x27010C4 (5fa8ca20c4): 0x0 >>>>>> Tx
FIFO Free Level MCAN_TXFQS[5-0] should not be 0

MCAN_TXBC
devmem2 0x27010c0 w
Value at address 0x27010C0 (10811260c0): 0x50094 >> Tx Buffers Start Address is 0x25

MCAN_TXBCF
devmem2 0x27010dc w

The question is, how diagnose this kind of problem of CAN. Please give us some advice.

Thanks,

Regards,

Jianqiang

Thanks,

Jianqiang

over 2 years ago

0 Karan Saxena over 2 years ago

TI__Guru* 76343 points

Hi Jianqiang

Sun Jianqiang said:
The internal and external loopback works well, but the transmitting pended there when I send CAN message to a external connected transceiver.

What do you mean when you say that external loopback works well? Are you sending to and receiving from an external node?

Have you taken care of changing the interrupt numbers and routing the interrupts now to A72 (original code would route interrupts to R5F)?

Are you correctly configuring the CAN transceiver?

Regards

Karan

0 Sun Jianqiang over 2 years ago in reply to Karan Saxena

Prodigy 210 points

Hi Karan,

The external/internal loopback means the TI's code implementation in file:

psdkqa/pdk/packages/ti/csl/example/mcan/mcanEvmLoopback/mcan_evm_loopback_app_main_k3.c

function:

static int32_t App_mcanConfig(bool enableInternalLpbk).

I have changed the interrupt numbers or the loopback could not work. The following is my code:

static canl_intobj_t g_main_ints[] = {
    {
    APP_MAIN_MCAN_0_INT0,
    APP_MAIN_MCAN_0_INT1,
    APP_MAIN_MCAN_0_TS_INT,
    },
    {
    APP_MAIN_MCAN_1_INT0,
    APP_MAIN_MCAN_1_INT1,
    APP_MAIN_MCAN_1_TS_INT,
    },
    {
    APP_MAIN_MCAN_2_INT0,
    APP_MAIN_MCAN_2_INT1,
    APP_MAIN_MCAN_2_TS_INT,
    },
    {       
    APP_MAIN_MCAN_3_INT0,
    APP_MAIN_MCAN_3_INT1,
    APP_MAIN_MCAN_3_TS_INT,
    },      
    {       
    APP_MAIN_MCAN_4_INT0,
    APP_MAIN_MCAN_4_INT1,
    APP_MAIN_MCAN_4_TS_INT,
    },
    {   
    APP_MAIN_MCAN_5_INT0,
    APP_MAIN_MCAN_5_INT1,
    APP_MAIN_MCAN_5_TS_INT,
    },
    {
    APP_MAIN_MCAN_6_INT0,
    APP_MAIN_MCAN_6_INT1,
    APP_MAIN_MCAN_6_TS_INT,
    },
    {
    APP_MAIN_MCAN_7_INT0,
    APP_MAIN_MCAN_7_INT1,
    APP_MAIN_MCAN_7_TS_INT,
    },
    {
    APP_MAIN_MCAN_8_INT0,
    APP_MAIN_MCAN_8_INT1,
    APP_MAIN_MCAN_8_TS_INT,
    },
    {
    APP_MAIN_MCAN_9_INT0,
    APP_MAIN_MCAN_9_INT1,
    APP_MAIN_MCAN_9_TS_INT,
    },
    {
    APP_MAIN_MCAN_10_INT0,
    APP_MAIN_MCAN_10_INT1,
    APP_MAIN_MCAN_10_TS_INT,
    },
    {
    APP_MAIN_MCAN_11_INT0,
    APP_MAIN_MCAN_11_INT1,
    APP_MAIN_MCAN_11_TS_INT,
    },

    ......
};

static int32_t canl_mcanRegisterIsr(canl_handle_t *hdl)
{
    int32_t configStatus = STW_SOK;
    cancsl_handle_t *cslhdl = &hdl->cslhdl;
    uint32_t instance = cslhdl->instance;

#if defined (BUILD_MCU1_0)
    /* Running Code from Mcu R5 */
    /* Needs Interrupt router configuration for getting interrupts to Mcu R5. */
/*#elif defined (BUILD_MCU2_0)*/
    /* Running Code from Main R5 */
#else
    /* Running Code from Main A72 */
    trace_me("l:enter %s\n", __func__);
    configStatus =  canl_mcanRegisterInterrupt(
            g_main_ints[instance].int0, &canl_mcanIntr0ISR, hdl);
    configStatus += canl_mcanRegisterInterrupt(
            g_main_ints[instance].int1, &canl_mcanIntr1ISR, hdl);
    configStatus += canl_mcanRegisterInterrupt(
            g_main_ints[instance].tsint, &canl_mcanTSIntrISR, hdl);
    trace_me("l:int0 %d int1 %d itsint %d\n",
            g_main_ints[instance].int0,
            g_main_ints[instance].int1,
            g_main_ints[instance].tsint
            );
#endif
    if(STW_SOK != configStatus) {
        perror("Interrupt Configuration failed.\n");
    } else {
        trace_me("l:Interrupt Configuration done.\n");
    }
    trace_me("l:leave %s(%d)\n", __func__, configStatus);
    
    return configStatus;
}

The following loopback mode log shows that, the interrupt works well,

J7200-EVM@QNX:/# can-mgr -v -rl -e
conf: inst 0, domain 1, role 2, id 4, datalen 16, timeout(2000000,2000000)
D:buf alloc: virt/16649ea000 phy/8f6d2b000
D:enter __can_control, instance 0
D:gpio offset en:0x18 stb:0x18
D:enstb:activeL:set stb bit 7 to 80
D:en:activeH:set en bit 6 to c0
D:leave __can_control
D:enter __can_control, instance 0
D:gpio offset en:0x40 stb:0x18
D:enstb:activeL:set stb bit 29 to 24100000
D:en:activeH:set en bit 13 to 20802000
D:leave __can_control
l:enter canl_open
c:enter cancsl_open
c:phyaddr 2700000 mapped to 16649eb000
c:phyaddr 2701000 mapped to 16649ec000
c:phyaddr 2708000 mapped to 16649ed000
c:phyaddr 2a78000 mapped to 16649f5000
c:leave cancsl_open
l:enter canl_mcanRegisterIsr
l:int0 156 int1 157 itsint 158
l:Interrupt Configuration done.
l:leave canl_mcanRegisterIsr(0)
l:enter canl_mcanConfig
l:enter cancsl_getRevisionId
l:leave cancsl_getRevisionId
l:MCANSS Revision ID:
l:scheme:0x1
l:Business Unit:0x2
l:Module ID:0x8e0
l:RTL Revision:0xa
l:Major Revision:0x1
l:Custom Revision:0x0
l:Minor Revision:0x1
l:enter cancsl_isFDOpEnable
l:leave cancsl_isFDOpEnable
l:CAN-FD operation is enabled through E-Fuse.
l:enter cancsl_isMemInitDone
l:leave cancsl_isMemInitDone
l:Endianess Value: 0x87654321
l:enter cancsl_init
l:leave cancsl_init
l:enter cancsl_config
l:leave cancsl_config
l:enter cancsl_setExtIDAndMask
l:leave cancsl_setExtIDAndMask
l:external loopback enabled
l:enter canl_mcanConfig
l:enter canl_int_enable
l:leave canl_int_enable
l:leave canl_open
D:txbuf:
31 32 33 23 41 41 42 42 43 43 44 44 45 45 46 46 
l:t:Message ID: 0x100000
l:t:Message Remote Transmission Request: 0x0
l:t:Message Extended Frame ID(0:11Bit ID/1:29bit ID): 0x0
l:t:Message Error State Indicator(0:Error Active/1:Error Passive): 0x0
l:t:Message Data Length Code: 0xa
l:t:Message BRS: 0x1
l:t:Message CAN FD format: 0x1
l:t:Message Store Tx Events: 0x1
l:t:Message Marker: 0xaa
l:t:Message DataByte 0: 0x31
l:t:Message DataByte 1: 0x32
l:t:Message DataByte 2: 0x33
l:t:Message DataByte 3: 0x23
l:t:Message DataByte 4: 0x41
l:t:Message DataByte 5: 0x41
l:t:Message DataByte 6: 0x42
l:t:Message DataByte 7: 0x42
l:t:Message DataByte 8: 0x43
l:t:Message DataByte 9: 0x43
l:t:Message DataByte 10: 0x44
l:t:Message DataByte 11: 0x44
l:t:Message DataByte 12: 0x45
l:t:Message DataByte 13: 0x45
l:t:Message DataByte 14: 0x46
l:t:Message DataByte 15: 0x46
c:enter MCAN_writeMsg
c:leave MCAN_writeMsg
l:enter cancsl_txBufAddReq(1)
l:leave cancsl_txBufAddReq(0)
l:enter canl_mcanIntr0ISR       ----------ISR(loopback mode)
l:txcomplete posted(0)          ----------txcomplete
l:rxcomplete posted(0)          ----------rxcomplete
l:t:blocking...done(2000000, 0)
l:leave canl_mcanIntr0ISR

folowing is my ported ISR:
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
static void canl_mcanIntr0ISR(uintptr_t arg)
{
    uint32_t intrStatus;
    canl_handle_t *hdl = (canl_handle_t *)arg;
    cancsl_handle_t *cslhdl = &hdl->cslhdl;

    trace_me("l:enter %s\n", __func__);

    intrStatus = cancsl_getIntrStatus(cslhdl);
    cancsl_clearIntrStatus(cslhdl, intrStatus);
    if (MCAN_INTR_SRC_TRANS_COMPLETE ==
        (intrStatus & MCAN_INTR_SRC_TRANS_COMPLETE)) {
        trace_me("l:txcomplete posted(0)\n");
        canl_osalPostLock(hdl->txcomplete);
    }

    if (MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG ==
        (intrStatus & MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG)) {
        canl_osalPostLock(hdl->rxcomplete);
        trace_me("l:rxcomplete posted(0)\n");
    }
    trace_me("l:leave %s\n", __func__);
}

static void canl_mcanIntr1ISR(uintptr_t arg)
{
    uint32_t intrStatus;
    canl_handle_t *hdl = (canl_handle_t *)arg;
    cancsl_handle_t *cslhdl = &hdl->cslhdl;

    trace_me("l:enter %s\n", __func__);

    intrStatus = cancsl_getIntrStatus(cslhdl);
    cancsl_clearIntrStatus(cslhdl, intrStatus);
    if (MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG ==
        (intrStatus & MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG)) {
        canl_osalPostLock(hdl->rxcomplete);
        trace_me("l:rxcomplete posted(1)\n");
    }
    trace_me("l:leave %s\n", __func__);
}
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~


l:r:blocking...done(0)
l:can_send success, payload Bytes:16
l:can_receive success, payload Bytes:16D:send success!
l:r:Message ID: 0x100008
l:r:Message Remote Transmission Request: 0x0

l:r:Message Extended Frame ID(0:11Bit ID/1:29bit ID): 0x0

l:r:Message Error State Indicator(0:Error Active/1:Error Passive): 0x0
l:r:Message TimeStamp: 0x0
l:r:Message Data Length Code: 0xa
l:r:Message BRS: 0x1
l:r:Message CAN FD format: 0x1
l:r:Message Filter Index: 0x0
l:r:Message Accept Non-matching Frame: 0x0
l:r:Message DataByte0: 0x31
l:r:Message DataByte1: 0x32
l:r:Message DataByte2: 0x33
l:r:Message DataByte3: 0x23
l:r:Message DataByte4: 0x41
l:r:Message DataByte5: 0x41
l:r:Message DataByte6: 0x42
l:r:Message DataByte7: 0x42
l:r:Message DataByte8: 0x43
l:r:Message DataByte9: 0x43
l:r:Message DataByte10: 0x44
l:r:Message DataByte11: 0x44
l:r:Message DataByte12: 0x45
l:r:Message DataByte13: 0x45
l:r:Message DataByte14: 0x46
l:r:Message DataByte15: 0x46
D:rxbuf(16):
31 32 33 23 41 41 42 42 43 43 44 44 45 45 46 46 
D:enter __can_control, instance 0
D:gpio offset en:0x18 stb:0x18
D:disstb:activeL:set stb bit 7 to 40
D:dis:activeH:set en bit 6 to 0
D:leave __can_control
D:enter __can_control, instance 0
D:gpio offset en:0x40 stb:0x18
D:disstb:activeL:set stb bit 29 to 4100000
D:dis:activeH:set en bit 13 to 20800000
D:leave __can_control
l:enter canl_close
l:leave canl_close

Regards,

Jianqiang

0 Sun Jianqiang over 2 years ago in reply to Sun Jianqiang

Prodigy 210 points

Hi Karan,

Is there any advice? We are blocked here:(

Thanks a lot,

Regards,

Jianqiang

0 Sun Jianqiang over 2 years ago in reply to Sun Jianqiang

Prodigy 210 points

Waiting for your reply.

Thanks,

Regards,

Jianqiang

0 Sun Jianqiang over 2 years ago in reply to Sun Jianqiang

Prodigy 210 points

The TI's code has some bugs. We have resolved it.

Thanks,

Jianqiang

0 Karan Saxena over 2 years ago in reply to Sun Jianqiang

TI__Guru* 76343 points

Hi Jianqiang

Thanks for the update, can you post the changes you had to make? If there is a bug in the driver / application code, we can fix that in the next SDK8.2.

Regards

Karan

Processors

Processors forum

DRA821U: MCAN send pending, no MCAN_INTR_SRC_TRANS_COMPLETE received(RTOS+QNX)