PROCESSOR-SDK-AM62X: GBE_SDP signal for IEEE 1588 trigger signal for Hardware implementation of PTP

Hello Kalpesh, 

Thank you for the Query.

I am trying to understand your question and would want to to provide some additional explanation.

DP83867 provides SOF functionality for implementing the 1588 functionality on the SoC side.

A diagram would help.

Regards,

Sreenivasa

Hi Sreenivasa,

Didn't find diagram.

Is this signal unidirectional or bidirectional?

Act as active low or active high?

Hello Kalpesh, 

For the PHY if you are referring the IEEE1588 SOF this is an output and for SoC this would be the reverse.

The DP83867 provides precision clock synchronization, including a synchronous Ethernet clock output. It has low latency and provides IEEE 1588 Start of Frame Detection.

Regards,

Sreenivasa

Hi Sreenivasa,

Thanks.

Incase,  IEEE1588 SOF this is an output and for SoC this would be the reverse.

How the signaling trigger would be? It just toggle once or communicate with stream of bits like 010101. If toggle once, Would it be transition from low to high or from high to low? 

Why we ask this as, We want to use level translation between phy(3.3V) and soc(1.8V).

Hello Kalpesh, 

Thank you for the note.

The Pin is Start of Frame Detection. and expected to toggle for every frame of data received.

Regards,

Sreenivasa

Hi Sreenivasa,

We get info from our one of the other team and they confirmed to use from phy out to soc in.

Is there any need in which soc can be output and phy can be input for this signal?

 Hello Kalpesh, 

We get info from our one of the other team and they confirmed to use from phy out to soc in.

This would be the use case.

Regards,

Sreenivasa