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Hi there,
A customer is working on the IPC between R5 and A53 using RP messages.
To debug their R5 application that based on our ipc_rpmsg_echo_linux example, they need to run the A53 from the SD card and R5 from CCS.
Currently they can activate the R5 by CCS but the A53 doesn't work or alternatively activate the A53 , with different boot pins configuration, but the R5 can't run from CCS.
they are looking for the boot pins configuration, or any other configuration, that let them both work.
Please advise how to configure it.
thank you.
What should work and I just tried:
If you try to connect to A53 it will mess up Linux, a little bit depending on what is going on there. But if you stick to R5 Linux should stay up with the above and looks like I can reboot the SoC from Linux and CCS just loses the connection. Redoing #3 after SoC boot allows halting and running R5.
Pekka
they are looking for the boot pins configuration, or any other configuration, that let them both work.
If this is on AM64x EVM, please check the following link for EVM boot switch configurations.
Thanks Pekka and Bin for your responses.
I'm not trying to connect to the A53 but debug the R5 processor.
I can connect to the R5 after the Linux loads the FW into it according to Pekka's instructions.
The code on the CCS is the code which the FW was built from.
I can put HW breakpoints on the disassembly but I can't enable SW breakpoints in the code.
I guess that it's all about any missing debug configuration.
Searching TI's forum, I didn't find any reference to this problem.
Please assist.
I can put HW breakpoints on the disassembly but I can't enable SW breakpoints in the code.
SW breakpoints modify the opcode and thus need write permission to the memory being used. This is one possibility of hat you are observing. See https://software-dl.ti.com/ccs/esd/documents/users_guide/ccs_debug-main.html#breakpoints . I tried with default SDK and the image that happens to be on R5 and both SW and HW break points work from the disassembly window. To get some progress is there some reason you can't use HW breakpoints? Are you seetting up so maby breakpoints you are running out of HW breakpoints?
Pekka
I can set SW breakpoints in the disassembly window but I'm trying to debug by setting breakpoints in the code itself.
It seems that the issue is about the symbols, as right after connecting to the R5 I receive the following:
The breakpoints I put in the code:
And their properties:
And again, the code on the CCS matches to the FW loaded by the Linux.
Please advise how to set the symbols.
Hello Dekel,
You can find steps for loading symbols for firmware that is already running on the remote core (i.e., the R5F) here:
https://software-dl.ti.com/processor-sdk-rtos/esd/AM65X/08_02_00_05/exports/docs/processor_sdk_rtos_am65xx_08_02_00_05/docs/user_guide/ccs_setup_am65xx.html#debugging-with-hlos-running-on-a53-linux
You can find steps for resetting the remote core and loading new firmware from CCS here:
https://software-dl.ti.com/mcu-plus-sdk/esd/AM62X/08_03_00_07/exports/docs/api_guide_am62x/CCS_LAUNCH_PAGE.html#CCS_LAUNCH
(Note that the "prerequisites" section may not apply to AM64x, since this document was written for AM62x).
Depending on your usecase, you may want to do one or the other (1. simply loading the firmware symbols, or 2. resetting the remote core and loading new firmware).
Regards,
Nick