Hi,
I'm working on a design for the DM814x where the video pipeline is such:
VFCC -> DSP (Vlpb) -> Software circular buffer -> SWMosaic -> VFDC (LCD)
Through the process it is going from 420SP to 422 on the output. However, when it comes to display, I get the attached image. The frame itself contains a smaller SVGA image that is padded with black pixels, in a sense to make it XGA. However, when the frame gets to the VFDC, it looks like it's going through SVGA timings only. I've changed the load-hd-firmware.sh to have vpss.ko use mode=dvo2:1024x768@60 with the display1 timings for XGA proper. What am I missing?
Is there another component or something that would fix the timings?