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hi:
1) now , based on rtos sdk8.0 . application : app board_diag_ospi , with update CSL_OSPI_BAUD_RATE_DIVISOR_DEFAULT from 32 to 6 , will change the OSPI work clk to about 22.2 .
but when I add another change , such as : set the OSPI_MODULE_CLOCK to OSPI_MODULE_CLK_200M , can not update the OSPI clk to 200/6 = 33.3 ,
can you help to do the update based on board_diag_ospi?
2) how to update the tx delay for CLK && data line?
with the params I only find the read delay , and have no idea to update the tx delay for meet the timg .
thanks
Hi,
but when I add another change , such as : set the OSPI_MODULE_CLOCK to OSPI_MODULE_CLK_200M , can not update the OSPI clk to 200/6 = 33.3 ,
How are you measuring this clock?
Also, can you please share a patch of all the changes done for the OSPI diag test?
Regards,
Parth
hi Parth:
in the file : packaged/ti/board/diag/ospi/src/ospi_test.c
with func BoardDiag_ospiFlashTest()
I set ospi_cfg.funcClk to OSPI_MODULE_CLK_200M with next line:
+ ospi_cfg.funcClk = OSPI_MODULE_CLK_200M;
OSPI_socSetInitCfg(BOARD_OSPI_INSTANCE, &ospi_cfg);
.....
Hi,
How are you measuring this clock?
Can you please reply to above as well?
Regards,
Parth
Hi,
Apologies for long delay in response.
is this issue still open? If yes, can you please mention the current state of the issue?
Regards,
Parth