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hi ti
The can is work on mcu2_0 on our project. Sometimes there is a issue, i have added request for transmission by MCAN_txBufAddReq(), and i also get the transfer status by MCAN_getProtocolStatus(), i think the status indicated that the transfer is succeed, but the can tool and opposite can device didn't received the data i transferd.
The status get from MCAN_getProtocolStatus() is
((MCAN_ERR_CODE_NO_ERROR == protStatus.lastErrCode) ||
(MCAN_ERR_CODE_NO_CHANGE == protStatus.lastErrCode)) &&
((MCAN_ERR_CODE_NO_ERROR == protStatus.dlec) ||
(MCAN_ERR_CODE_NO_CHANGE == protStatus.dlec)) &&
(protStatus.busOffStatus == 0U) &&
(0U == protStatus.pxe))
How to debug this issue?
Thanks a lot!
we use TJA1043, I use logic analyzer to capture signal waveform of the pin of TXD, the logic analyzer also lost the data wave that can tool didn't received. Although from the point of view of software i add request transmition succeed, and get the suceeseful transfer status.
Hi,
Are you using any example from the PDK? If yes, can you please point me to the example and share the changes that you have done on the top of it? Also, are you using a custom board or this is on TI-EVM. Please mention the SDK version you are using as well.
Regards,
Parth
hi Parth
Thanks for your reply! And sorry for the late reply because of the Spring Festival holiday.
The PDK example we use is mcan_evm_loopback_app_main_k3.c and use custom board. The SDK version is 08.02.00.03.
changed settings as follows:
initParams.brsEnable = 0; // 0x1U;
initParams.darEnable = 0;//0x1U;
msgRAMConfigParams.lss = 0; // APP_MCAN_STD_ID_FILTER_NUM;
* Configuring 500Kbps 2Mbps as nominal and data bit-rate respectively */
bitTimes.nomRatePrescalar = 0xFU;
bitTimes.nomTimeSeg1 = 0x6U;
bitTimes.nomTimeSeg2 = 0x1U;
bitTimes.nomSynchJumpWidth = 0x0U;
bitTimes.dataRatePrescalar = 0x3U;
bitTimes.dataTimeSeg1 = 0x6U;
bitTimes.dataTimeSeg2 = 0x1U;
bitTimes.dataSynchJumpWidth = 0x0U;
The following configuration was deleted
// stdFiltelem.sfid2 = 0x0U;
// stdFiltelem.sfid1 = 0x4U;
// stdFiltelem.sfec = 0x7U;
// stdFiltelem.sft = 0x0U;
the interrupt function as follows:
static void App_mcanIntr0ISR(uintptr_t arg)
{
AppMcan_Instance * inst = (AppMcan_Instance *)arg;
uint32_t intrStatus;
intrStatus = MCAN_getIntrStatus(inst->mcanModAddr);
MCAN_clearIntrStatus(inst->mcanModAddr, intrStatus);
if ( (intrStatus & MCAN_INTR_SRC_TRANS_COMPLETE) ||
(intrStatus & MCAN_INTR_SRC_PROTOCOL_ERR_ARB) ||
(intrStatus & MCAN_INTR_SRC_BUS_OFF_STATUS) ||
(intrStatus & MCAN_INTR_SRC_ERR_PASSIVE))
{
SemaphoreP_post(inst->transferSem);
}
if (MCAN_IE_RF1NE_MASK ==
(intrStatus & MCAN_IE_RF1NE_MASK))
{
SemaphoreP_post(inst->receiverSem);
}
}
hi Parth
I am looking forward to your reply!And there are new problems, sometimes the data transfered from other can device can not be received by TDA4 .
The can bus is canfd and 500k+2M.
Hi,
How frequently do you see this issue? Is there any consistent pattern for this to occur?
Regards,
Parth
hi Parth
The problem occur not regularly。And the situation is that when there are continuous frames in the transmission of canfd it is easy to happen.
Can you please share the MCAN register dump before and after the failure?
Regards,
Parth
hi Parth
Any update? Sometimes the data transfered from other can device can not be received by TDA4.HOW to debug?
hi Parth
You can use the CCS memory browser to get the dump.
-------------->since our custom board doesn't layout the JTAG interface,is there any other method to debug the issue?
hi Parth
Any update?Looking forward to your reply. Thanks.Our hardware design diagram。Do you have any suggestions?
hi Parth
we found that The same data transmission scenario, when data transfer to tda4 in very hight speed, TDA4 is more likely to fail to receive a certain piece of data。Does this information help solve the problem?
hi Parth
The project is about to enter the mass production stage. This problem has troubled us for a long time and is very urgent. Please give help, thank you very much.
Hi,
We'll need the register dump for the failure case. If JTAG is not available, can you please print the registers and share the dump.
It would be best if we can get the complete register dump, but if not possible, we'll at least need :MCAN_PSR (for protocol errors), MCAN_IR (for which event caused the interrupt), MCAN_IE (which interrupt events were enabled), MCAN_ECR (for error counters)
Regards,
Parth
hi Parth
Thanks a lot! I will reproduce the problem as soon as possible and dump the register at the time of the problem.
hi Parth
I have catch the log, i print the mcan register when interrupt occur, the logs seems too more. as fllowing
Is this normal phenomenon? why are there so many interruptions。
[MCU1_0] 12-30 2:26:4.256411 1223.654468 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x50.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256440 1223.654575 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x80.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256468 1223.654684 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x80.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256496 1223.654796 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x50.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256524 1223.654902 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x80.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256552 1223.655408 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x50.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256580 1223.655510 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x80.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256608 1223.655622 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x80.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256637 1223.656422 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x50.MCAN_PSR=0xd300f MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256665 1223.656523 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x80.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256693 1223.656631 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x80.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256721 1223.657457 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x50.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256750 1223.657580 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x80.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256783 1223.657671 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x80.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256812 1223.657784 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x50.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256841 1223.658392 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x50.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256868 1223.658505 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x80.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256896 1223.658611 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x80.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256932 1223.659399 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x50.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256960 1223.659508 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x80.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256988 1223.659616 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x50.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.257015 1223.660476 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x50.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.257043 1223.662424 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x50.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.257070 1223.662829 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x50.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.257098 1223.662942 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x80.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.267187 1223.664752 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x50.MCAN_PSR=0xd3017 MCAN_ECR=0x0
hi ti
From the register,fifl is full,and lost the data, is this the root cause to lost the can data?
MCAN_IR =0x50.MCAN_PSR=0xd3017 MCAN_ECR=0x0
MCAN_IR =0x80.MCAN_PSR=0xd3017 MCAN_ECR=0x0
Hi,
Looking at the register dump, looks like you are not transmitting at all. The MCAN_PSR register, MCAN is operating as a receiver node ACT[4-3]: 0x2
Can you send across your code? Also, please take one dump for working case as well and share.
Regards,
Parth
hi Parth
Yes, now the issue occure is not at the transmiting time, but at the receiving.Our current problem is that we can't receive all the data, there is a probability of losing a frame of data. From the register dump, the fifo is full ,and lost the data,we should increase the fifo to solve the issue, am I right?How to increase fifo? Just increase the values of APP_MCAN_FIFO_0_NUM &APP_MCAN_FIFO_1_NUM ?
#define APP_MCAN_FIFO_0_START_ADDR (548U)
#define APP_MCAN_FIFO_0_NUM (5U)APP_MCAN_FIFO_1_NUM
#define APP_MCAN_FIFO_1_START_ADDR (748U)
#define (5U)
#define APP_MCAN_RX_BUFF_START_ADDR (948U)
msgRAMConfigParams.rxFIFO0startAddr = APP_MCAN_FIFO_0_START_ADDR;
msgRAMConfigParams.rxFIFO0size = APP_MCAN_FIFO_0_NUM;
msgRAMConfigParams.rxFIFO0waterMark = 3U;
msgRAMConfigParams.rxFIFO0OpMode = 0U;
msgRAMConfigParams.rxFIFO1startAddr = APP_MCAN_FIFO_1_START_ADDR;
msgRAMConfigParams.rxFIFO1size = APP_MCAN_FIFO_1_NUM;
msgRAMConfigParams.rxFIFO1waterMark = 3U;
msgRAMConfigParams.rxFIFO1OpMode = 0U;
msgRAMConfigParams.rxBufStartAddr = APP_MCAN_RX_BUFF_START_ADDR;
msgRAMConfigParams.rxBufElemSize = MCAN_ELEM_SIZE_64BYTES;
msgRAMConfigParams.rxFIFO0ElemSize = MCAN_ELEM_SIZE_64BYTES;
msgRAMConfigParams.rxFIFO1ElemSize = MCAN_ELEM_SIZE_64BYTES;
static void App_mcanIntr0ISR(uintptr_t arg)
{
AppMcan_Instance * inst = (AppMcan_Instance *)arg;
uint32_t intrStatus;
intrStatus = MCAN_getIntrStatus(inst->mcanModAddr);
MCAN_clearIntrStatus(inst->mcanModAddr, intrStatus);
if ( (intrStatus & MCAN_INTR_SRC_TRANS_COMPLETE) ||
(intrStatus & MCAN_INTR_SRC_PROTOCOL_ERR_ARB) ||
(intrStatus & MCAN_INTR_SRC_BUS_OFF_STATUS) ||
(intrStatus & MCAN_INTR_SRC_ERR_PASSIVE))
{
SemaphoreP_post(inst->transferSem);----->transmite completion
}
if (MCAN_IE_RF1NE_MASK ==
(intrStatus & MCAN_IE_RF1NE_MASK))
{
SemaphoreP_post(inst->receiverSem);------->receive the data
}
}
Difference between our setting and reference code
initParams.darEnable = 0;//0x1U; ----->1change to 0
msgRAMConfigParams.lss = 0; // APP_MCAN_STD_ID_FILTER_NUM;-------->1change to 0
* Configuring 500Kbps 2Mbps as nominal and data bit-rate respectively */ 500K+2M
bitTimes.nomRatePrescalar = 0xFU;
bitTimes.nomTimeSeg1 = 0x6U;
bitTimes.nomTimeSeg2 = 0x1U;
bitTimes.nomSynchJumpWidth = 0x0U;
bitTimes.dataRatePrescalar = 0x3U;
bitTimes.dataTimeSeg1 = 0x6U;
bitTimes.dataTimeSeg2 = 0x1U;
bitTimes.dataSynchJumpWidth = 0x0U;
delete the settings
// stdFiltelem.sfid2 = 0x0U;
// stdFiltelem.sfid1 = 0x4U;
// stdFiltelem.sfec = 0x7U;
// stdFiltelem.sft = 0x0U;
receive function:
MCAN_getErrCounters(mcanModAddr, &errCounter);
if (/*(0U == errCounter.recErrCnt) &&*/
(0U == errCounter.canErrLogCnt))
{
MCAN_RxFIFOStatus fifoStatus;
fifoStatus.num = (uint32_t)MCAN_RX_FIFO_NUM_1;
MCAN_getRxFIFOStatus(mcanModAddr, &fifoStatus);
MCAN_readMsgRam(mcanModAddr,
MCAN_MEM_TYPE_FIFO,
fifoStatus.getIdx,
(uint32_t)fifoStatus.num,
&rxMsg);
(void)MCAN_writeRxFIFOAck(mcanModAddr,
(uint32_t)fifoStatus.num,
fifoStatus.getIdx);
crxparser_recevied(inst->index, rxMsg.id >> 18, rxMsg.data, gMcanAppdataSize[rxMsg.dlc]);
}
else
{
LOGE("MCAN: Error in reception %d: rec %d, cel %d!!!\n", inst->index, errCounter.recErrCnt, errCounter.canErrLogCnt);
}
Let's back up a bit.
Earlier, you were seeing failures when trying to transmit the data. Is that working now?
If yes, what changes did you do to make it work?
Now, while receiving, what is the frequency of failure? Is it happening few time in long run for hours or you can see this issue every time you are trying to receive?
Regards,
Parth
hi Parth
Let me summarize our problems:
1. The failures happen when trying to transmit the data.
We didn't dump the registers when the issue happening.We will continue to test, and dump the registers when the failure happen
2. The failure happen when receive the data, tda4 has lost one can data.
When the failure happen, we dump the registers as following.(the default value of APP_MCAN_FIFO_0_NUM &APP_MCAN_FIFO_1_NUM is 5)
[MCU1_0] 12-30 2:26:4.256868 1223.658505 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x80.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256896 1223.658611 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x80.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256932 1223.659399 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x50.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256960 1223.659508 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x80.MCAN_PSR=0xd3017 MCAN_ECR=0x0
[MCU1_0] 12-30 2:26:4.256988 1223.659616 s: MCAN: App_mcanIntr0ISR inst->index=0, MCAN_IR =0x50.MCAN_PSR=0xd3017 MCAN_ECR=0x0
From the register, the rx fifo full, lost the data,i think,maybe the rx fifo can be increased to
more larger. Is my analysis correct? if yes, how to increase the rx fifo?
I modified our current rx fifo & tx fifo as follows, from 5 to 8. Is this correct?(The modified software is being tested. I'm not sure whether it will help solve the problem)
#define APP_MCAN_FIFO_0_START_ADDR (548U)
#define APP_MCAN_FIFO_0_NUM (8U)---> change from 5 to 8U
#define APP_MCAN_FIFO_1_START_ADDR (748U)
#define APP_MCAN_FIFO_1_NUM (8U)---> change from 5 to 8U
#define APP_MCAN_TX_BUFF_SIZE (8U)---> change from 5 to 8U
#define APP_MCAN_TX_FIFO_SIZE (8U)--> change from 5 to 8U
The issue is not happen every test but the frequency is almost about 60%. If the issue happen, the test will stop. It usually happen a few minutes or more after the test .This problem occurred in the ota upgrade test, so the can data is very large and the transmission speed is very fast。
Hi,
The issue is not happen every test but the frequency is almost about 60%. If the issue happen, the test will stop. It usually happen a few minutes or more after the test .This problem occurred in the ota upgrade test, so the can data is very large and the transmission speed is very fast。
Yes, please try and increase the FIFO size,
I modified our current rx fifo as follows, from 5 to 8. Is this correct?(The modified software is being tested. I'm not sure whether it will help solve the problem)
Yes, this is the correct way of increasing the FIFO size, please let us know the behavior
The failures happen when trying to transmit the data.
We didn't dump the registers when the issue happening.We will continue to test, and dump the registers when the failure happen
Please get that dump as well and share.
Regards,
Parth
hi Parth
question 1: I have increased the FIFO size from 5 to 15, the failure rate of receiving data is greatly reduced. Is there any other risk of this modify? How much can this num maximum be set? Is it 28?
#define APP_MCAN_FIFO_0_START_ADDR (548U)
#define APP_MCAN_FIFO_0_NUM (15U)---> change from 5 to 8U
#define APP_MCAN_FIFO_1_START_ADDR (748U)
#define APP_MCAN_FIFO_1_NUM (15U)---> change from 5 to 8U
question 2: Sometimes it may occur that the time for receiving this frame of data on the can bus is longer than the time shown in the log that the transmission was successful。Detailed information is as follows。How to analyze such issues?
tda4 can data transfer log:
The time interval between receved id 701 and tarnsfer id 709 are within one millisecond
[MCU1_0] 1222.670000 s: ====otadebug==== MCAN: receive in=0, id=701, data=0x10 f9 36 7b!
[MCU1_0] 1222.670316 s: ====otadebug==== MCAN: transfer in=0, id=709, data=0x30 0 1 0!
[MCU1_0] 1222.670514 s: ====otadebug==== MCAN: transfer successfully, id=000, data=0x709 30 0 1! act=0 errPassive=1 warningStatus=0dlec=0 resi=0 rbrs=0 rfdf=1 pxe=1 tdcv=0
the can bus data as follows, The time interval between id 701 and id 709 is 147 ms.
[09:22:22.355] 0x701 10 f9 36 7b
[09:22:22.508] 0x709 30 00 01 00 00 00 00 00
transfer function as following:
int32_t App_mcanImplementTransfer(candata_t *cd)
{
uint32_t mcanModAddr;
int32_t testStatus = CSL_PASS;
AppMcan_Instance * inst;
MCAN_ProtocolStatus protStatus;
MCAN_TxBufElement txMsg;
assert(cd);
assert(cd->len<=CANFD_DATA_SIZE);
assert(cd->in<ARY_SIZE(appMcanInsts));
inst = &appMcanInsts[cd->in];
mcanModAddr = inst->mcanModAddr;
/* Initialize message to transmit */
txMsg.id = ((uint32_t)(cd->id) << 18U);
txMsg.rtr = 0U;
txMsg.xtd = 0U;
txMsg.esi = 0U;
if(cd->in == 0)
{
txMsg.fdf = 1;
txMsg.brs = 1; // 1U;
}
else
{
txMsg.fdf = 0; // 1U;
txMsg.brs = 0; // 1U;
}
txMsg.efc = 1U;
txMsg.mm = 0xAAU;
txMsg.dlc = gMcanAppSizeDlc[cd->len];
memcpy(txMsg.data, cd->d, cd->len);
// appLogPrintf("MCAN: transfer in=%d, id=%03x, len=%d!\n", cd->in, cd->id, cd->len);
MutexP_lock(inst->transferMutex, MutexP_WAIT_FOREVER);
/* Write message to Msg RAM */
MCAN_writeMsgRam(mcanModAddr,
MCAN_MEM_TYPE_BUF,
1U,
&txMsg);
/* Add request for transmission */
if(cd->id==0x709)
appLogPrintf("====otadebug==== MCAN: transfer in=%d, id=%03x, data=0x%x %x %x %x!\n", cd->in, cd->id, cd->d[0], cd->d[1], cd->d[2], cd->d[3]);
testStatus = MCAN_txBufAddReq(mcanModAddr, 1U);
if (CSL_PASS == testStatus)
{
// appLogPrintf("successfully MCAN_txBufAddReq, pend TX SAM now...\n");
if (SemaphoreP_pend(inst->transferSem, 1000) == SemaphoreP_OK)
{
MCAN_getProtocolStatus(mcanModAddr, &protStatus);
/* Checking for Errors */
if (((MCAN_ERR_CODE_NO_ERROR == protStatus.lastErrCode) ||
(MCAN_ERR_CODE_NO_CHANGE == protStatus.lastErrCode)) &&
((MCAN_ERR_CODE_NO_ERROR == protStatus.dlec) ||
(MCAN_ERR_CODE_NO_CHANGE == protStatus.dlec)) &&
(protStatus.busOffStatus == 0U) &&
(0U == protStatus.pxe))
{
// appLogPrintf("MCAN: %d successfully transferred %x", cd->in, cd->id);
if(cd->id==0x709)
appLogPrintf("====otadebug==== MCAN: transfer successfully, id=%03x, data=0x%x %x %x %x! act=%d errPassive=%d warningStatus=%d"
"dlec=%d resi=%d rbrs=%d rfdf=%d pxe=%d tdcv=%d\n",
cd->in, cd->id, cd->d[0], cd->d[1], cd->d[2], cd->d[3],protStatus.act,protStatus.errPassive,protStatus.warningStatus,protStatus.dlec,
protStatus.resi,protStatus.rbrs,protStatus.rfdf,protStatus.pxe,protStatus.tdcv);
}
interrupt function:
static void App_mcanIntr0ISR(uintptr_t arg)
{
AppMcan_Instance * inst = (AppMcan_Instance *)arg;
uint32_t intrStatus;
intrStatus = MCAN_getIntrStatus(inst->mcanModAddr);
MCAN_clearIntrStatus(inst->mcanModAddr, intrStatus);
if ( (intrStatus & MCAN_INTR_SRC_TRANS_COMPLETE) ||
(intrStatus & MCAN_INTR_SRC_PROTOCOL_ERR_ARB) ||
(intrStatus & MCAN_INTR_SRC_BUS_OFF_STATUS) ||
(intrStatus & MCAN_INTR_SRC_ERR_PASSIVE))
{
SemaphoreP_post(inst->transferSem);
}
// if (MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG ==
// (intrStatus & MCAN_INTR_SRC_DEDICATED_RX_BUFF_MSG))
// {
// gMcanIsrIntr1Flag = 0U;
// }
if (MCAN_IE_RF1NE_MASK ==
(intrStatus & MCAN_IE_RF1NE_MASK))
{
SemaphoreP_post(inst->receiverSem);
}
}
hi Parth
question : I have increased the FIFO size from 5 to 15, the failure rate of receiving data is greatly reduced. Is there any other risk of this modify? How much can this num maximum be set? Is it 28?
#define APP_MCAN_FIFO_0_START_ADDR (548U)
#define APP_MCAN_FIFO_0_NUM (15U)---> change from 5 to 15U
#define APP_MCAN_FIFO_1_START_ADDR (748U)
#define APP_MCAN_FIFO_1_NUM (15U)---> change from 5 to 15U
Hi,
There is no risk as such in increasing the FIFO size. But this is not a permanent solution to the issue. Increasing the FIFO size can reduce the risk of overflow but this indicates that the rate of read from FIFO < rate of writing to FIFO, which needs to be addressed, otherwise, in a longer run you can still encounter the issue.
Can you please share how you are reading from the FIFO? Also, can you analyze at your end and make sure there are no additional delays in reading the FIFO?
Regards,
Parth
hi Parth
Thanks for your reply!
Yes,i also suspect that the rate of read from FIFO < rate of writing to FIFO is the root cause.
But what is the maximum value of fifo?
And i have add the log that the time cost of read the fifo, to Check if there is a problem with taking too long to read the fifo
read fifo code as follows: Please help check if there is a problem with the method of read fifo,thanks a lot.
when receive interrupt happen,will post SemaphoreP_post(inst->receiverSem)
if (SemaphoreP_pend(inst->receiverSem, SemaphoreP_WAIT_FOREVER) == SemaphoreP_OK)
{
/* Checking for Errors */
MCAN_getErrCounters(mcanModAddr, &errCounter);
if (/*(0U == errCounter.recErrCnt) &&*/
(0U == errCounter.canErrLogCnt))
{
MCAN_RxFIFOStatus fifoStatus;
fifoStatus.num = (uint32_t)MCAN_RX_FIFO_NUM_1;
MCAN_getRxFIFOStatus(mcanModAddr, &fifoStatus);
MCAN_readMsgRam(mcanModAddr,
MCAN_MEM_TYPE_FIFO,
fifoStatus.getIdx,
(uint32_t)fifoStatus.num,
&rxMsg);
(void)MCAN_writeRxFIFOAck(mcanModAddr,
(uint32_t)fifoStatus.num,
fifoStatus.getIdx);
crxparser_recevied(inst->index, rxMsg.id >> 18, rxMsg.data, gMcanAppdataSize[rxMsg.dlc]);
//send the can data to other function, as following
}
else
{
LOGE("MCAN: Error in reception %d: rec %d, cel %d!!!\n", inst->index, errCounter.recErrCnt, errCounter.canErrLogCnt);
}
}
void crxparser_recevied(uint8_t cin, uint16_t cid, uint8_t *dt, uint8_t len)
{
candata_t cd;
cd.in = cin;
cd.id = cid;
cd.len = MIN(len, sizeof(cd.d));
memcpy(cd.d, dt, cd.len);
if(cd.id==0x701)
appLogPrintf("=ota= MCAN: receive id=%03x, 0x%x %x %x %x!\n", cd.id, cd.d[0], cd.d[1], cd.d[2], cd.d[3]);
(void)MailboxP_post(mailboxHandle, &cd, 0);
}
hi Parth
question :1. About the RX fifo, how much rx fifo can this num maximum be set?
#define APP_MCAN_FIFO_0_START_ADDR (548U)
#define APP_MCAN_FIFO_0_NUM (18U)---> change from 5 to 18U
#define APP_MCAN_FIFO_1_START_ADDR (748U)
#define APP_MCAN_FIFO_1_NUM (18U)---> change from 5 to 18U
2.Is there any problem of reading from the FIFO?
Hello,
Sorry for the inconvenience,is still support expected on this thread ?
Regards
Tarun Mukesh