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AM4378:u-boot WARNING: CPU: 0 PID: 1 at drivers/bus/omap_l3_noc.c:141 l3_interrupt_handler

Hidekazu
Intellectual 780 points
Other Parts Discussed in Thread: AM4378, SN65LVDS93A

Hi,Expert

I am trying to make u-boot output bmp image in SD card to LCD connected to AM4378 DSS
by LVDS (SN65LVDS93A) on a custom board with AM4378, and continue to display LCD
even when kernel is booted.
I was able to display bmp image on LCD by changing u-boot, but warning log is outputted
only once when kernel is booted.

The LCD backlight is turned on by u-boot, controlled by I2C0 and PWM1.
Even after the warning log is output, the kernel does not panic and the LCD can be displayed, so it appears to have booted normally.

TI_SDK:v7.3.0.005
The u-boot code is custom It has been changed to the board (LCD compatible) specification.
The u-boot code can be found at e2e.ti.com/.../2592257
to custom board (LCD compatible) specifications.


-- Environment --

・TI_SDK:v7.3.0.005
・The u-boot code is changed to a custom board (LCD compatible) specification referring to
the thread below.

e2e.ti.com/.../2592257

-- Question --

Q1:Is it possible to continue using AM4378 even after the warning log is output?
Q2:Do you need recovery processing?
Q3:If recovery processing is required, could you tell me the modules (DSS, etc.) that require recovery?
Q4:If there is no problem with this warning, is there a way to hide the warning log?

-- Log --

Starting kernel ...

[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 5.4.106-g023faefa70 (xxx@xxx-VirtualBox) (gcc version 9.2.1 20191025 (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10))) #14 PREEMPT Mon Jun 27 18:19:39 JST 2022
[ 0.000000] CPU: ARMv7 Processor [412fc09a] revision 10 (ARMv7), cr=10c53c7d
[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[ 0.000000] OF: fdt: Machine model: TI AM437x GP EVM
[ 0.000000] Memory policy: Data cache writeback
[ 0.000000] efi: Getting EFI parameters from FDT:
[ 0.000000] efi: UEFI not found.
[ 0.000000] cma: Reserved 48 MiB at 0xfcc00000
[ 0.000000] CPU: All CPU(s) started in SVC mode.
[ 0.000000] AM437x ES1.2 (sgx neon)
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 522559
[ 0.000000] Kernel command line: console=ttyO0,115200n8 spidev.bufsiz=8192 root=PARTUUID=9e5558a1-02 rw rootfstype=ext4 rootwait
[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear)
[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[ 0.000000] Memory: 2013568K/2097148K available (9216K kernel code, 293K rwdata, 3092K rodata, 1024K init, 257K bss, 34428K reserved, 49152K cma-reserved, 1261564K highmem)
[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
[ 0.000000] Tasks RCU enabled.
[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
[ 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
[ 0.000000] L2C: platform modifies aux control register: 0x0e030000 -> 0x3e430000
[ 0.000000] L2C: DT/platform modifies aux control register: 0x0e030000 -> 0x3e430000
[ 0.000000] L2C-310 enabling early BRESP for Cortex-A9
[ 0.000000] OMAP L2C310: ROM does not support power control setting
[ 0.000000] L2C-310 dynamic clock gating disabled, standby mode disabled
[ 0.000000] L2C-310 cache controller enabled, 16 ways, 256 kB
[ 0.000000] L2C-310: CACHE_ID 0x410000c9, AUX_CTRL 0x4e430000
[ 0.000000] random: get_random_bytes called from start_kernel+0x2b4/0x470 with crng_init=0
[ 0.000000] OMAP clockevent source: timer2 at 24000000 Hz
[ 0.000011] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 89478484971ns
[ 0.000028] clocksource: timer1: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns
[ 0.000036] OMAP clocksource: timer1 at 24000000 Hz
[ 0.000478] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns
[ 0.000487] OMAP clocksource: 32k_counter at 32768 Hz
[ 0.001015] Console: colour dummy device 80x30
[ 0.001047] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0'
[ 0.001052] This ensures that you still see kernel messages. Please
[ 0.001055] update your kernel commandline.
[ 0.001093] Calibrating delay loop... 1987.37 BogoMIPS (lpj=9936896)
[ 0.060182] pid_max: default: 32768 minimum: 301
[ 0.060382] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes, linear)
[ 0.060404] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes, linear)
[ 0.061290] CPU: Testing write buffer coherency: ok
[ 0.061352] CPU0: Spectre v2: using BPIALL workaround
[ 0.062221] Setting up static identity map for 0x80100000 - 0x80100060
[ 0.062368] rcu: Hierarchical SRCU implementation.
[ 0.062451] EFI services will not be available.
[ 0.063103] devtmpfs: initialized
[ 0.074943] VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
[ 0.075342] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[ 0.075364] futex hash table entries: 256 (order: -1, 3072 bytes, linear)
[ 0.078560] pinctrl core: initialized pinctrl subsystem
[ 0.079318] DMI not present or invalid.
[ 0.079783] NET: Registered protocol family 16
[ 0.081524] DMA: preallocated 256 KiB pool for atomic coherent allocations
[ 0.103040] cpuidle: using governor ladder
[ 0.103074] cpuidle: using governor menu
[ 0.104701] omap_l3_probe: in
[ 0.104766] omap_l3_probe: [0] res=0xee95c480, l3->l3_base[i]=0xf2400000
[ 0.104774] omap_l3_probe: [0] res->start=0x44000000, res->end=0x443fffff
[ 0.104809] omap_l3_probe: [1] res=0xee95c4a0, l3->l3_base[i]=0xf2c00000
[ 0.104816] omap_l3_probe: [1] res->start=0x44800000, res->end=0x44bfffff
[ 0.104835] omap_l3_probe: l3->debug_irq=20
[ 0.104898] omap_l3_probe: l3->app_irq=21
[ 0.104926] omap_l3_noc 44000000.ocp: l3_interrupt_handler: i=1irq = 21, err_reg=0x00000080
[ 0.104926]
[ 0.104937] ------------[ cut here ]------------
[ 0.104971] WARNING: CPU: 0 PID: 1 at drivers/bus/omap_l3_noc.c:141 l3_interrupt_handler+0x37c/0x400
[ 0.104979] 44000000.ocp:L3 Custom Error: MASTER DSS TARGET GPMC (Read): Data Access in User mode during Functional access
[ 0.104984] Modules linked in:
[ 0.104997] CPU: 0 PID: 1 Comm: swapper Not tainted 5.4.106-g023faefa70 #14
[ 0.105003] Hardware name: Generic AM43 (Flattened Device Tree)
[ 0.105039] [<c010eb08>] (unwind_backtrace) from [<c010b2f0>] (show_stack+0x10/0x14)
[ 0.105064] [<c010b2f0>] (show_stack) from [<c0957f40>] (__warn+0xd0/0xe8)
[ 0.105079] [<c0957f40>] (__warn) from [<c0957ff0>] (warn_slowpath_fmt+0x98/0xc8)
[ 0.105092] [<c0957ff0>] (warn_slowpath_fmt) from [<c046ea90>] (l3_interrupt_handler+0x37c/0x400)
[ 0.105108] [<c046ea90>] (l3_interrupt_handler) from [<c016d6c4>] (__handle_irq_event_percpu+0x50/0x13c)
[ 0.105119] [<c016d6c4>] (__handle_irq_event_percpu) from [<c016d7e0>] (handle_irq_event_percpu+0x30/0x8c)
[ 0.105128] [<c016d7e0>] (handle_irq_event_percpu) from [<c016d888>] (handle_irq_event+0x4c/0x8c)
[ 0.105142] [<c016d888>] (handle_irq_event) from [<c0171708>] (handle_fasteoi_irq+0xb4/0x184)
[ 0.105166] [<c0171708>] (handle_fasteoi_irq) from [<c016c89c>] (generic_handle_irq+0x24/0x34)
[ 0.105179] [<c016c89c>] (generic_handle_irq) from [<c016d014>] (__handle_domain_irq+0x54/0xa4)
[ 0.105190] [<c016d014>] (__handle_domain_irq) from [<c046d3b0>] (gic_handle_irq+0x3c/0x68)
[ 0.105203] [<c046d3b0>] (gic_handle_irq) from [<c0101a8c>] (__irq_svc+0x6c/0xa8)
[ 0.105210] Exception stack(0xee88bc58 to 0xee88bca0)
[ 0.105217] bc40: ee809900 ee95f800
[ 0.105226] bc60: 00000000 00000000 ee809900 00000000 ee95f800 00000015 ee8099c0 60000053
[ 0.105235] bc80: 00000000 ee95c5c0 00000200 ee88bca8 c016f4f4 c016f504 60000053 ffffffff
[ 0.105247] [<c0101a8c>] (__irq_svc) from [<c016f504>] (__setup_irq+0x394/0x874)
[ 0.105257] [<c016f504>] (__setup_irq) from [<c016fb44>] (request_threaded_irq+0xd0/0x148)
[ 0.105269] [<c016fb44>] (request_threaded_irq) from [<c017291c>] (devm_request_threaded_irq+0x64/0xb8)
[ 0.105282] [<c017291c>] (devm_request_threaded_irq) from [<c095b68c>] (omap_l3_probe+0x2c8/0x304)
[ 0.105304] [<c095b68c>] (omap_l3_probe) from [<c05d2094>] (platform_drv_probe+0x48/0x98)
[ 0.105318] [<c05d2094>] (platform_drv_probe) from [<c05d01fc>] (really_probe+0x1e0/0x348)
[ 0.105328] [<c05d01fc>] (really_probe) from [<c05d04d8>] (driver_probe_device+0x60/0x170)
[ 0.105339] [<c05d04d8>] (driver_probe_device) from [<c05ce48c>] (bus_for_each_drv+0x84/0xd0)
[ 0.105349] [<c05ce48c>] (bus_for_each_drv) from [<c05cffa8>] (__device_attach+0xf0/0x15c)
[ 0.105359] [<c05cffa8>] (__device_attach) from [<c05cf30c>] (bus_probe_device+0x84/0x8c)
[ 0.105368] [<c05cf30c>] (bus_probe_device) from [<c05cc700>] (device_add+0x370/0x60c)
[ 0.105385] [<c05cc700>] (device_add) from [<c0769ee4>] (of_platform_device_create_pdata+0x9c/0xd8)
[ 0.105397] [<c0769ee4>] (of_platform_device_create_pdata) from [<c076a0d4>] (of_platform_bus_create+0x1a8/0x244)
[ 0.105407] [<c076a0d4>] (of_platform_bus_create) from [<c076a2dc>] (of_platform_populate+0x6c/0xdc)
[ 0.105426] [<c076a2dc>] (of_platform_populate) from [<c0e0cec8>] (pdata_quirks_init+0x70/0x80)
[ 0.105438] [<c0e0cec8>] (pdata_quirks_init) from [<c0e0ce50>] (omap_generic_init+0x10/0x18)
[ 0.105459] [<c0e0ce50>] (omap_generic_init) from [<c0e03924>] (customize_machine+0x20/0x30)
[ 0.105474] [<c0e03924>] (customize_machine) from [<c0102648>] (do_one_initcall+0x58/0x1c4)
[ 0.105486] [<c0102648>] (do_one_initcall) from [<c0e00ee4>] (kernel_init_freeable+0x124/0x1c0)
[ 0.105509] [<c0e00ee4>] (kernel_init_freeable) from [<c09637ac>] (kernel_init+0x8/0x110)
[ 0.105520] [<c09637ac>] (kernel_init) from [<c01010e8>] (ret_from_fork+0x14/0x2c)
[ 0.105526] Exception stack(0xee88bfb0 to 0xee88bff8)
[ 0.105532] bfa0: 00000000 00000000 00000000 00000000
[ 0.105540] bfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 0.105548] bfe0: 00000000 00000000 00000000 00000000 00000013 00000000
[ 0.105561] ---[ end trace 803a56ff1627779d ]---


Best Regards
Hidekazu

  • 0
    TI__Mastermind 36225 points

    Hello Hidekazu,

    In general, Uboot does not service the L3_NOC interrupt and it only gets serviced in Kernel. It's possible that the DSS tried to access a region in Uboot that does not exist. As an experiment, try disabling splash from Uboot and see if the L3_NOC shows up in Kernel.

    Regards,
    Krunal

  • 0 in reply to Krunal Bhargav34
    Expert 1770 points

    Hi, Krunal

    This was a question from one of our clients, and since I was not available, I had a colleague ask it on my behalf.
    The customer has reported back to me about the experiment.
    Can you give us an idea on how to deal with it?

    ----------------------------------------------------------------------------------------------------
    Disabling splash (no DSS register setting) did not cause warning (L3_NOC).
    LCD setting and frame buffer setting in the DSS register and
    GO_LCD (bit 5) of the DISPC_CTRL register is set to 1, warning (L3_NOC) occurs.
    If GO_LCD (bit 5) of the DISPC_CTRL register is left at 0, warning will not occur.

    Is it possible to carry over the state of running dsss in u-boot to the kernel (in a way that warnings are not generated)?
    If so, could you please provide information on how to achieve this?
    ----------------------------------------------------------------------------------------------------

    Best Regards

    Kouji Nishigata

  • 0 in reply to user1201164
    TI__Mastermind 36225 points

    Hello Kouji,

    The only way that I can think of is it manually clear the bit that Kernel checks for l3-noc errors in Uboot and here is the code: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/drivers/bus/omap_l3_noc.c?h=ti-linux-5.10.y.

    Regards,
    Krunal

  • 0 in reply to Krunal Bhargav34
    Expert 1770 points

    Hi,Krunal

    We have received a report and a question from a customer about the execution results.

    Referring to omap_l3_noc.c, we added a process (clear_l3_noc_event()) to remove warninig error factors before starting the kernel in u-boot (announce_and_cleanup() in bootm.c). As a result, we confirmed that warnings are no longer output.

    bootm.c
static void announce_and_cleanup(int fake)
{
    :
              board_quiesce_devices();

#if 1       /* test */
              clear_l3_noc_event();
#endif   /* test */

              printf("\nStarting kernel ...%s\n\n", fake ?
                            "(fake run for tracing)" : "");
    :
}

    Will this error, which occurred with LCD output enabled, affect other functions (I2C, DDR, MMC, etc.)?
    If it does not affect other functions, we will try to clear the error factor in l3_noc as a response to this issue.

    Best Regards,

    Kouji Nishigata

  • 0 in reply to user1201164
    TI__Mastermind 36225 points

    Hi Kouji,

    It should not have any impact on other functions and it's just a warning telling you that the LCD tried to access a region that does not exist.

    Regards,

    Krunal

  • 0 in reply to Krunal Bhargav34
    Expert 1770 points

    Hi,Krunal

    Thanks for your response.

    Your question is over, please Close this thread.

    (I don't see the [This resolved my issue] button, so I can't press it)

    Best Regards,

    Kouji Nishigata