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AM4376: AM437x not booting with eMMC

Part Number: AM4376
Other Parts Discussed in Thread: CSD

Hi,

We have been trying to boot from the eMMC on the AM4376(GP). We have not been successful in getting a stable MLO to run and output debug printouts. We have been successful with an SD card with the same partition scheme in FAT32 mode.

NAME         MAJ:MIN RM  SIZE RO TYPE MOUNTPOINT
mmcblk0      179:0    0 29.8G  0 disk 
|-mmcblk0p1  179:1    0  128M  0 part /run/media/mmcblk0p1
`-mmcblk0p2  179:2    0  3.9G  0 part /
mmcblk1      179:16   0 14.8G  0 disk 
|-mmcblk1p1  179:17   0  128M  0 part /run/media/mmcblk1p1
`-mmcblk1p2  179:18   0  3.9G  0 part /run/media/mmcblk1p2
mmcblk1boot0 179:32   0 31.5M  1 disk 
mmcblk1boot1 179:48   0 31.5M  1 disk 

(Partition 1 is FAT32 and partition 2 is .ext3)

The Sysboot setup is SYSBOOT[4:0] = 10100 to default to eMMC when there is no SD card.

We wait for all boot sources to cycle but we do not see any debug printouts.

When booting from alternate source we can access the eMMC in mmcblk1 as shown above.

(eMMC Schematic)

(AM4376 eMMC Schematic)

We have removed DS from the board as we have seen in previous conversation that was recommended to be left floating for eMMC 4.5( to disable 5.x)

Please advise.

Thank you!

  • Additionally we are not using a PMIC for the device. 

  • Hello,

    Please allow a few days to look into this issue.

    regards,

    Judith

  • Hello,
    In order to boot the first bootloader SPL/MLO from eMMC by ROM, the eMMC pins used needs to compatible to Section 5.2.6.5.8 Pins Used in AM43xx TRM.
    Best,
    -Hong

  • How can we control the pinmux registers during ROM operation, other than to strap SYSBOOT correctly?

    Will the refclock frequency make any difference during eMMC boot (we're using 25MHz)

  • Hello,
    ROM configures the pinmux on the eMMC pins as specified in "5.2.6.5.8 Pins Used" in the TRM.
    You may refer to "5.2.6.5 MMC/SD Cards" on the default configuration by ROM for eMMC booting.
    Best,
    -Hong

  • Hi,

    I worked with Aneesh on the same case. Our sysboot is confirmed to be right. Our chip part number is "AM4378BZDNA100S". We connected the EMMC_CLK, EMMC_CMDEMMC_D0 and EMMC_D1 to the Logic Analyzer and found the command sequence (from the boot ROM) is:

    Clk speed is ~200KHz

    CMD0 (GO_IDLE_STATE): Reset all SD cards
    CMD8 (SEND_IF_COND): Send interface condition to card (arg:0x000001aa)
    No response, eMMC supposed to response with (R1)
    CMD55 + CMD1= ACMD41 (SEND_OP_COND): CMD1 (arg:0x00000000), read OCR
    Response: R1 (0x00ff8080) Decive busy
    CMD1 (SEND_OP_COND): CMD1 (arg:0x40ff8080)
    Response: R1 (0x00ff8080) Decive busy
    CMD1 (SEND_OP_COND): CMD1 (arg:0x40ff8080)
    Response: R1 (0xC0ff8080) Device ready
    CMD2 (ALL_SEND_CID): Ask card for CID number (arg:0x40ff8080)
    Response: R2 (MID-0x13, Micron...)
    CMD3 (SEND_RELATIVE_ADDR): Ask card for new relative card address (RCA) (Arg:0x12340000)
    Response: R6 (0x00000500)
    CMD9 (SEND_CSD): Send card-specific data (CSD) (Arg:0x12340000)
    Response: R2 (... CCC=0x8F5 )
    CMD4 (SET_DSR): CMD4 (Arg: 0x04040000)
    Clk speed switched to ~12.5MHz
    CMD7 (SELECT/DESELECT_CARD): Select / deselect card (Arg:12340000)
    Response: R6 (0x00000700)
    Response: R6
    CMD16 (SET_BLOCKLEN): Arg(0x00000200)
    Response: R1 (0x00000900) Set the block length to 2304 bytes
    CMD8 (SEND_EXT_CSD) (Arg 00000000)
    Response: (0x00000000)
    D0 start to toggle, becomes all 0s after ~512Bytes (the ECSD read)

    On a working 3rd party EV board, we see exact the same sequence till this point, but on our board, there is no more EMMC_CMD change and nothing on D0 for 10s until trying next boot media, but the 3rd party board had more EMMC_CMD changes and eventually boot to Linux.

    Our board stops after ECSD  register read and does not issue any EMMC flash read. From the logic analyzer, the captured ECSD read:

    00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
    01 03 20 B3 BD 00 00 00 00 00 00 00 00 00 00 00
    00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
    00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
    00 00 00 00 01 00 00 00 00 00 01 00 00 00 00 00
    00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
    00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
    00 00 00 00 00 00 00 00 00 00 00 00 00 FC 00 00
    00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00
    00 00 00 00 00 00 00 00 00 00 00 00 00 AB 03 00
    07 00 00 00 00 00 15 1F 20 00 00 00 00 00 00 00
    00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
    08 00 02 00 57 1F 0F 01 00 00 00 00 00 00 00 00
    00 00 00 01 00 40 DA 01 0E 14 00 00 00 10 01 01
    01 00 FC 00 07 01 01 51 01 00 00 00 00 00 00 00
    01 0A 00 00 00 00 00 32 0A 00 04 00 00 00 34 34
    51 4E 30 31 53 34 00 00 00 40 00 01 01 01 00 00
    00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
    00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
    00 00 00 1F 01 00 00 00 00 00 AE 00 B1 00 CF 00
    00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
    00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
    CE 00 00 00 00 00 00 00 00 00 00 80 00 00 01 00
    00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00
    00 AC 01 00 00 00 C9 00 00 00 00 00 00 01 00 00
    00 00 00 00 00 00 00 00 00 01 00 00 00 00 01 00
    00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00
    00 00 02 00 00 01 00 00 00 00 00 00 00 00 00 00
    00 00 00 00 00 00 03 00 00 01 00 00 00 00 00 00
    00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
    00 00 00 00 00 00 01 FF FF 00 00 00 00 01 03 03
    05 00 03 01 00 00 01 01 01 00 00 00 00 00 00 00
    CB FA FE 00 00 00 00 00 00 00 00 00 00 00 00 00

    The bold part matches the eMMC chip  (MTFC16GAPALBH-AAT) size. 

    The eMMC detect sequence is not aligned to TRM (SPRUHL71) PG213~214

    Again, our board stops sending and emmc cmd after the ECSD read (the content on D0 for ECSD  seems to be right)

    Any suggestions?  

  • Hello Ling,

    Our chip part number is "AM4378BZDNA100S"

    1/. Have we booted "the non-working board" with "AM4378BZDNA100S" from any boot media?
    2/. If yes, which binary is flashed to eMMC on non-working board?
    3/. What is the chip P/N on "On a working 3rd party EV board"?
    Best,
    -Hong

  • Hi Hong,
    I have a clarification here, we have tried two types of TI chips on the same PCB design, one is "AM4376BZDND100", the other is "AM4378BZDNA100S", which is a secure-boot processor. It would boot from non-signed image for sure.
  • Hello Ling,
    It seems like eMMC booting got started by ROM, but failed to continue booting somehow.
    Is there a JTAG available on your board?
    If yes, can we try "attaching" JTAG to the board to pinpoint to which point code is running up to? where "attaching" means attach/connect JTAG without target reset. Let's use JTAG debugger to find out if SPL starts to run on the board.
    a). if yes, SPL needs to be debugged further to see where lock-up is.
    b). if no, rom boot progress can be checked via reading trace vector as described in "5.2.3.2.5 Tracing Data" of the TRM.
    Best,
    -Hong

  • Hi Hong,

    Just to clarify again, the SPL (MLO) had not been loaded yet. The ROM code stop sending any eMMC command after ECSD (512 byte register, not the flash) read. From the logic analyzer, I don't see any eMMC flash read command on the EMMC_CMD line from the boot ROM code.

    I am quite confused by the JTAG debugger part, are you suggesting me to debug the ROM code using the JTAG debugger? How does that work? Will you provide me the ROM code source and binary to start with?

    Thanks

    Ling

  • Hello Ling,
    If JTAG is available on your board, one option is dumping the ROM trace vector with JTAG to help pinpointing to which point code runs up to.
    ROM trace vector are described in "5.2.3.2.5 Tracing Data" and "5.2.12 Tracing" of the TRM.
    In general, JTAG debugger is useful for any board bring-up.
    Best,
    -Hong