This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM62A USB Boot - no success, reset

We have received our first boards and work on the bring up. Review has been done prior to production by TI and necessary modifications has been considered. Compared to the EVM we use a different DDR4 and plan to use USB Boot. At the moment we face the following issues:

  • JTAG - we do have basic connection to SOC, however, we cannot connect to any Core
  • USB Boot - My PC recognizes the device and I can also start a transfer, but then there is an immediate reset. And it's not a HW reset (the line between PMCI and AM62A stays high). So apparently the boot ROM starts, but then the SoC is resetting.

So what kind of verification we can do? What are the minimum requirements to have USB boot working? (DDR init, Voltages, Sequence, clock, ...)

  • We have received our first boards and work on the bring up. Review has been done prior to production by TI and necessary modifications has been considered. Compared to the EVM we use a different DDR4 and plan to use USB Boot. At the moment we face the following issues:

    • JTAG - we do have basic connection to SOC, however, we cannot connect to any Core
    • USB Boot - My PC recognizes the device and I can also start a transfer, but then there is an immediate reset. And it's not a HW reset (the line between PMCI and AM62A stays high). So apparently the boot ROM starts, but then the SoC is resetting.

    So what kind of verification we can do? What are the minimum requirements to have JTAG access to the core? (Voltages, Sequence, clock, ...)

  • Sven, you should be able to at least connect to SMS0_TIFS_0 core.  If not, either you have an issue with the device or the JTAG connection.  Which Target Configuration are you using?  What is the error message when you connect to SMS0_TIFS_0? 

    Does a JTAG scan chain test work (open up Target Configuration,  click Basic tab, click Test Connection)?

    Regards,

    James

  • JTAG "Test Connection" works fine

     

    Connection TIFS0 fails

     

  • Do you know if you are working with an HSFS (field secured) or a GP (general purpose) AM62Ax?

    Regards,

    James

  • We do use an GP device

  • Sven,

    in that case, you should be able to connect to the SMS0_TIFS_0 core via JTAG.  Something is fundamentally wrong with the power up of the device.  Check resets inputs (PORz and RESETz) and reset outputs (RESETSTATz and MCU_RESETSTATz, power,, and your 25MHz input clock.  Also check your bootmode signals.  Can you send a snapshot of the bootmode portion of the schematic?  Do you have any peripherals attached to the bootmode signals that might be conflicting with the intended latching of the signals?

    Regards,

    James

  • resets inputs (PORz and RESETz)

    and reset outputs (RESETSTATz and MCU_RESETSTATz, power,

    , and your 25MHz input clock.

      Also check your bootmode signals. 

    Can you send a snapshot of the bootmode portion of the schematic? 

    Do you have any peripherals attached to the bootmode signals that might be conflicting with the intended latching of the signals?

    I don't think so, however, the entire schematics are available in your organization. It has been shared with sreenivasa.km@ti.com

  • Thanks for the scope shots.  One thing i noticed that may be marginal is the reset vs clock.  Since they weren't on the same scope shot, i had to combine two of them and you may want to capture together as well.  It looks like on one scope shot the input clock takes around 23ms after initial power up to stabilize.  The MCU_PORz signal has similar timing.  Need to ensure the MCU_PORz rises after input clock has stabilized.

    I will try to get the full schematic and take a look.

    Regards,

    James

  • scope plot with V_SYS vs. MCU_PORZ vs. PORZ_OUT vs. OSC

    looks OK to me, what is your opinion?

  • Sven, thanks for the scope shot.  Yes that looks OK

    After looking at the schematic, i have some questions in trying to figure out why you can't connect via JTAG to any core:

    -you have a signal called BOOT_MODE which affects some of the boot mode signals using transistors.  Just ensure that is working as expected, and providing proper voltage levels for all of the bootmode signals.  Improper voltage levels or undefined bootmodes can possibly cause what you are observing.

    -monitor RESETSTATz and MCU_RESETSTATz throughout the whole process of trying to connect to the SMS0_TIFS_0 core.  Just trying to see if you are getting an inadvertent reset to the processor

    -is the same behavior happening on multiple boards?

    As for USB, it appears you have USB0 setup for USB host mode (i'm seeing this board provides VBUS).  USB DFU requires the port to be setup as a peripheral.  

    Regards,

    James

  • Hi James,

    we looked at the part # and it looks like we do have secure silicon ...

    why it looks like, the part # (62A74ATM6HIAM) doesn't match TRM decription in the field parametrer Y (6H: 2x digits instead of 1 digit) ...

    Please can you confirm silicon type we have with part #: 62A74ATM6HIAM?

    Many thanks and best regards

    Marcus

  • Greetings Marcus,

    Can you verify the part number and send a picture of the package? It looks like there could be some missing digits from what we expect.

    Sincerely,

    Lucas

  • Hi Lucas,

    please find the picture of the AM62A device on our actual produced samples:

    Kind regards,

    Sven

  • Greetings Sven,

    Thank you, we will take a look at this and discuss it.

    Sincerely,

    Lucas

  • Sven, check note 1 below the table.  It looks like you have a prototype device which was symbolized differently at the time.  So yours is equivalent to  XAM62A74AUMHIAMB

    Regards,

    James