AM625: USB PHY Core Voltage Selection and VDDA_CORE_USB mismatch

Part Number: AM625

According to the AM625 TRM and Datasheet USB0_PHY_CTRL_CORE_VOLTAGE and USB1_PHY_CTRL_CORE_VOLTAGE need to be configured according to VDDA_CORE_USB voltage (that is the same as VDD_CORE). In our case this voltage is 0.85V, therefore PHY_CTRL_CORE_VOLTAGE needs to be set to 0h, however the reset default is 1h.

During manufacturing we do load the firmware over DFU/USB, that means that we have a period of time in which we do use the USB interface and this value is not configured correctly.

Which kind of issue can happen if

1. VDDA_CORE_USB is 0.85V and USB0_PHY_CTRL_CORE_VOLTAGE is 1h

2. VDDA_CORE_USB is 0.75V and USB0_PHY_CTRL_CORE_VOLTAGE is 0h

11 months ago

0 Kallikuppa Sreenivasa 11 months ago

TI__Guru*** 133198 points

Hello FD,

Thank you for the query.

The data sheet has the below supply pins.

VDDA_CORE_USB
VDDA_1P8_USB
VDDA_3P3_USB

The supplies are common for USB0 and USB1.

From the hardware point of view i do not see any concern with the connection.

fd said:
According to the AM625 TRM and Datasheet USB0_PHY_CTRL_CORE_VOLTAGE and USB1_PHY_CTRL_CORE_VOLTAGE need to be configured according to VDDA_CORE_USB voltage (that is the same as VDD_CORE).

Could me point me to the section that is recommending the setting for me to check internally.

Regards,

Sreenivasa

+1 -DK- 11 months ago

TI__Mastermind 27840 points

Hello,

We have recently determined this bit needs to be set to '0' in all cases and we are in the process of updating our documentation to reflect this.

0 fd 11 months ago in reply to -DK-

Intellectual 515 points

Thanks, this helps.

Any downside expected in the scenario I mentioned in my initial request? This bit is by default 1h.

0 fd 11 months ago in reply to Kallikuppa Sreenivasa

Intellectual 515 points

Kallikuppa Sreenivasa

"6.1.1.3.3.81.1 WKUP_MMR0_USB0_PHY_CTRL Register (Offset = 4008h) [reset = 80000004h ]"

+1 -DK- 10 months ago in reply to fd

TI__Mastermind 27840 points

Hello,

'0' is the optimized setting for this device. No "downside" is expected, but system SW should update this register to the supported ('0') setting.

Processors

Processors forum

AM625: USB PHY Core Voltage Selection and VDDA_CORE_USB mismatch