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TMS320C6674: When using EMIF boot mode, how does the PLL boot config (bootmode[12:10], HW Setting) affect the boot?

JiHan LEE
Prodigy 10 points
Part Number: TMS320C6674

Hi

I am using TMS320C6674 and have a question.

I am booting the DSP using EMIF Boot mode. There are no issues with the operation, but even when I change the Bootmode[12:10] PLL boot config setting, it continues to work fine.

According to the information in the datasheet, I understood that the Boot PLL varies depending on Bootmode[12:10].

Is my understanding correct, or does EMIF not affect the Boot PLL?

-TMS320C6674 datasheet(Please refer to the PLL Boot Configuration Setting in section 2.5.4.)

(https://www.ti.com/lit/ds/symlink/tms320c6674.pdf?ts=1701333457816&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FTMS320C6674%253FkeyMatch%253DTMS320C6674%2526tisearch%253Dsearch-everything%2526usecase%253DGPN)

  • 0
    TI__Mastermind 22715 points

    Jihan Lee,

    Let me look at it and get back.

    Regards

    Shankari G

  • +1 in reply to Shankari G
    TI__Mastermind 22715 points

    JiHan LEE,

    A good question. Thanks.

    Yes, your understanding is exactly right.

    1. For EMIF16 boot mode configuration, In Bootmode[12:10],  boot mode bits - 10,11 and 12 are not used. Just the boot mode bits from 0 to 9 are used. 

    2. For EMIF16 boot mode, the main PLL is set by the RBL.   

    3. For better understanding look at the other boot modes like SPI, in which the boot mode bits 10, 11 and 12 are used. For I2c boot mode, boot mode bits 10 and 11 are used. 

    ------

    More info here on the PLL :- https://www.ti.com/lit/ug/sprugy5c/sprugy5c.pdf - Boot loader user guide.

    The RBL also ensures that the power and clock domains are enabled for any peripherals that are required for boot. • The RBL configures the system PLL to set the device speed. The boot configuration pins provide the RBL with the information about the reference clock used in the system. RBL gets the optimal operating speed of the device from the e-fuse register. The various reference clock frequency and operating clock frequency lists are available in the device-specific data manual. • The main PLL stays in bypass mode for no-boot, SPI, and I2C boot. For other boot modes, a PLL initialization sequence executes inside the boot ROM to configure the main PLL in PLL mode.

    Regards

    Shankari G