• State Resolved
  • Locked Locked
  • Replies 7 replies
  • Answers 1 answer
  • Subscribers 102 subscribers
  • Views 180 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TDA4VM: do a reset status register is existing on the navss spinlock module is existing ?

idont know
Prodigy 40 points
Part Number: TDA4VM
Other Parts Discussed in Thread: SYSCONFIG

Hello TI support.

I am currently working on a baremetal environnement on TDA4VM processor. I want to acces to the NAVSS spinlock component in the main domain.

I am already able to lock ,release and (soft) reset it but i am not able to know if the reset is ended or not.

i don't see in the documentation if there is a systatus register that i could use to get this information or if it enven exist.

thank you in advance

  • 0
    TI__Guru* 87495 points

    Hello,

    There is no separate register for soft-reset complete status. There is a SYSSTATUS register, but that is not relevant here, it only conveys the total number of locks and a group lock status bit that indicates if any of 32 locks are taken.

     

    regards

    Suman

  • 0 in reply to Suman Anna
    Prodigy 40 points

    thank you suman.

    but it did not completly resolved my issue.

    after writing 1 in the bit 1 of the SPINLOCK_SYSCONFIG register to do a soft reset of the spinlock module.

    is there an existing way to get the information that the reset sequence have been executed correctly and is ended? or is it a not provided feature?

  • +1 in reply to idont know
    TI__Guru* 87495 points

    Hello,

    There is no separate status bit. The bit is self-clearing, so you can read upon it. Meant to paste the whole picture before, but missed it (I have updated the previous respose).

    In anycase, this is a very small IP and the reset should be really really quick.

    What is your usecase for performing soft-reset? This is not required in general, as the IP goes through the reset when you power-on the module. Given that the Spinlock IP is used by multi-processors, it is not expected that you will be doing a soft-reset unilaterally from one processor.

    regards

    Suman

  • 0 in reply to Suman Anna
    Prodigy 40 points

    hello suman ,

    in the documentation we can read : ". The SPINLOCK_SYSTATUS[0] RESETDONE bit can be polled to check the reset status (reading 1 indicates that reset sequence is done; reading 0 indicates that reset sequence is in progress)."

    but, i can not find the address of the SPINLOCK_SYSTATUS[0] RESETDONE register, do you know wich one it is ?

  • +1 in reply to idont know
    TI__Guru* 87495 points

    Hello,

    This IP is reused from a previous generation SoC family, and the above section is a left-over from that section.

    There is no RESETDONE bit on the current TDA4 generation of SoCs.

    regards

    Suman

  • 0 in reply to Suman Anna
    Prodigy 20 points

    Hello Suman,

    When can we expect a new revision of the reference manual for the TDA4AH processor ?

    Will a new SDK be released as well?

    Thank you

    Abdelhakim

  • 0 in reply to Abdelhakim DAOUDI
    TI__Guru* 87495 points

    Hi Abdelhakim,

    Abdelhakim DAOUDI said:
    When can we expect a new revision of the reference manual for the TDA4AH processor ?

    This is planned for the next couple of months within this quarter.

    Abdelhakim DAOUDI said:
    Will a new SDK be released as well?

    This is imminent. We should have a new SDK released by end of today or atmost by Mon/Tue.

    regards

    Suman