Other Parts Discussed in Thread: SYSBIOS,
Tool/software:
Hi TI team,
We are using DRA74x SoC where two GPIO pins (GPIO7_24 and GPIO7_10) of the same GPIO bank (GPIO7) are being used as an interrupt.
Is it possible to register ISR of GPIO7_10 at A15 core(Running with Linux) while registering ISR of GPIO7_24 at M4 core(Running with SysBios)?
If yes, Could you please help how can we achieve that?
Note: We are using TI_VISION_SDK_03_04