transfer from external FPGA to C6678

What are your choices for how the FPGA will be functionally connected to the EVM6678?

1.EMIF16 CEn

2.CEn ->DDR by EDMA

I still did not connect the FPGA.

I will first like to know all options..

Hi,

Other options are PCIe, SRIO and Hyperlink.

You will really want to analyze your data throughput needs first and then pick one.  There's benefits to each of the high speed interfaces.  Ethernet, SRIO, and PCIe are probably your best bet for higher speed data.  If even more bandwidth is required than HyperLink may want to be used.  If you can get by with lower bandwidth, then EMIF-16 may be more what you want to use. 

That said, you've provided too little info about what you're data usage is for us to give very good suggestions.  You may want to go to the product page -> TMS320C6678 and pull up the Throughput Performance Guide for C66x - Keystone devices - It's listed under the Applications Notes.

Ethernet seem to be a good solution.

I would like to know:

1. can we use the RJ45 on the evm ?

2. where can I find a good example for such implementation without getting lost in all datasheets?

Thanks, Ami

Yes, you can use the RJ45 on the EVM.  I'd suggest you start w/ the NDK (Network Developers Kit.) http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/ndk/index.html

Best Regards,

Chad

Thank you. I am currently going through the datasheets and running example applications.

However, as I said at first my goal is quite clear/simple:

1. send a large amount of data from a FPGA to the processor.

2. store the data in memory / buffers. if possible using EDAM to involve the CPU as little as possible.

3. get an interrupt after receiving all / part of the data. I thought such an applications is pretty standard and simple..

(Other devices, e.g. 5509, although at a much lower throughput, can be implemented with DMA and EMIF in a very simple way).

As I posted before my question is how to overcome this issue in the fastest way ? What are the steps I must follow? 

Thanks again,

Ami

Your goal is simple, but the ways that it can be accomplished are many and complex.  There's no 'right' connection to an FPGA.  An FPGA can connect to our DSP in a number of ways.  And throughput is always a consideration when selecting the most appropriate peripheral to connect with.

This includes using EMIF and EDMA as a very simple but not too high data throughput method.

So again, what are your throughput requirements.  With this we can better suggest an IP.

Best Regards,
Chad

With no doubt you are right. We are trying to run forward as fast as possible..

These are the basic requirements (at the moment):

1. throughput : about 1 Gbit/s.

2. element size can be from 2 byte up to 3840 byte (- whatever is most efficient), while:

3. the total frame size should be about 480*3840 bytes.

4. we hope to process information from one frame while the next can arrive.

which means we should have at least 2 blocks.

Thanks,
Ami

SGMII/Ethernet may be pushing it if you use one lane, but should be fine for two lanes.  You can use the NDK and example code from it.  Any FGPA portion of the solution we do not provide, so you'll want to work with your FPGA vendor for such support.  Other alternatives would SRIO or PCIe implementation.  We have example code for the DSP side on usage of all of these peripherals, but again the FPGA solution would need to come from the FPGA vendor.

For prototyping you can use the AMC backplane to a board with an FPGA on it.  Or possible a straight Ethernet connection via the RJ45 connector.

Best Regards,
Chad

I thought that in order to simplify the interface with the FPGA we should work with raw ethernet. Is that true ?

I tried to run the example in client_evm.

Sending raw data is working fine but I could not recieve any data..

(We tested the FPGA's data with Wireshark and we can see the pck: 4 bytes DA, 4 bytes SA, 2 bytes Type 0x0300, 14 bytes Length, Data).

What can I do in order to progress ??

Ami

In addition,

This is the example I'm using:

sraw = socket (AF_RAWETH, SOCK_RAWETH, 0x300);

I would like to understand:

1. With raw ethernet how does the phy-layer identify end of frame ?

2. Which fields are essential for the raw ethernet to identify that this package is actually not different.

3. From what I understand it's based on the 2 byte - type field but 0x300 can also be the length of another protocol.

Thanks again,

Ami