This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320C6678: FPGA to C6678 Data transfer over ethernet

Part Number: TMS320C6678
Other Parts Discussed in Thread: FFTLIB

Hi,

I am working on C6678 Custom board,my task is to perform FFT using DSPLIB function on all l cores of C6678 in parallel.Input data for FFT is a digitized sine wave of 10Khz coming from FPGA (vertex7) over Ethernet.Kindly suggest efficient algorithm to accomplish this task.My confusion is that  since data is coming continuously then how data management and FFT computation will be managed by cores?

Regards 

  • Hi Siddiqui,

    I've forwarded this to the DSPLib experts. Their feedback should be posted here.

    BR
    Tsvetolin Shulev

  • Is the data you are receiving fixed or floating point data ? If it floating point then is it single precision format or double precision. Based on this we may be able to make a recommendation for appropriate algorithm in the DSPLIB to use. when the data is coming in continuous format, we recommend using ping pong mechanism for data movement.

    Look at this example for this radar system computing floating point FFT based on the data obtained from ADC interface:
    www.tij.co.jp/.../swra564.pdf

    Antoher good example for you to refer would be to refer to the image processing demonstration in the Processor SDK RTOS for this device, that reads an image over ethernet and then passes the data to DSP subsytem (Number of cores is selected by user)
    processors.wiki.ti.com/.../Processor_SDK_RTOS_Image_Processing_Demo

    Apart from FFT function in DSPLIB, You can also look at FFTLIB which is part of our software release that is optimized for parallel mutli-core implementation of FFTs on this architecture.

    Regards,
    Rahul
  • Thanks Rahul ,

    Here is the answer of your questions regarding my design,


    1) I am receiving 16bit signed integer from FPGA.
    2) Kindly share example code for ping pong mechanism of data movement when data is coming from Ethernet.
    3) I have referred image processing demonstration in the Processor SDK RTOS , but according to my  understanding that example is not dealing with continuous data 
     
    4)I have referred FFTLIB but due to limited support/documentation I am unable to use the kernels of that LIB.If you can share any example describing the use of FFTLIB kernels I will be really grateful 
     
    Regards
     
     
     
  • still waiting for reply
  • FFLIB projects have test project included along with the kernel implementation: For Example, please refer to double precision 1 dimensional FFT in the directory path :
    fftlib_c66x_2_0_0_2\packages\ti\fftlib\src

    All folders with omp in their name have a test driver project in the FFTLIB.

    I have looped in my colleague who may be able to respond to getting data from Ethernet portion of your post.

    Regards,
    Rahul