H.264 BP encoder integration on C6678

Hi Oleg,

ecpy.ae674 is compatible with c66. However, in order to use C6678 H264BP encoder lib which builds on framework components (FC), just linking ECPY lib is not sufficient.

With FC, codec lib uses ECPY + IRES, and codec unit test App uses RMAN. To my best knowledge, in order to use codec lib which builds on FC, we must use RTSC project that builds on SYS/BIOS. Please refer to C6678 H264BP encoder unit test project (C66x_h264venc_01_24_00_01_ELF\packages\ti\sdo\codecs\h264venc\App\Client\Build\TestAppEncoder) as one example. The FC related major items are summarized as below:

1) H264VEncApp6678.cfg: specify FC modules to be used by the project, such as DSKT2, RMAN, ECPY, and etc (after the line of /*Added for using ECPY */). With this, all the required FC libs will be automatically linked (this can seen from the following file generated from compilation: Client\Build\TestAppEncoder\Debug_Mcore\configPkg\package\cfg\H264VEncApp6678_pe66.xdl)

2) Use RMAN in TestAppEncoder.c: RMAN_init() for initialize RMAN. Before calling RMAN_init, EDMA3 region configuration has been specified in C6608_config[ ] (defined in edmaConfig.c). After ALG_create(), do RMAN_assignResources() and RMAN_activateAllResources() to assign and activate EDMA3 resources. At the end before ALG_delete, free RMAN: RMAN_deactivateAllResources(), RMAN_freeResources().

Thanks,

Hongmei

Hello,

Below are the answers to your questions:- 

Oleg Fomenko said:

Hi,

I'm trying to use H.264 BP encoder for C66x (version 1.24.00.01) on C6678 evm.

I used this codec on C64+ in the past and now I work on migration to C66x platform

I don't use SYS/BIOS and RTSC in the project

>>>> Most FC libraries assume BIOS as the OS. Have you successfully used FC on C64+ before ? Is there a reason you are not using BIOS/RTSC ?

As I understand this library uses ECPY external library for EDMA implementation. 

>>>> Yes ECPY is a relatively new DMA library meant for high performance EDMA transfers.

When I tried to link it with my project I saw many undefined symbols from ecpy library. Then I added the following library:

framework_components_3_20_02_29/packages/ti/sdo/fc/ecpy/lib/release/ecpy.ae674

>>>> That sounds like the correct library to add. It is compatible with C66. I'm a little confused about how you are arriving on the right versions to use. FC doesn't officially support C6678 platform till the 3.21.* release, but you seem to be using an older FC version ? Is that what the codec team recommended ? 

From the 3.24 release (not yet out) onwards, FC will specifically build for the C66 target.

But I still get the following linkage error:

undefined first referenced 
symbol in file 
--------- ---------------- 
ECPY_CFG_PARAMS /opt/ti/framework_components_3_20_02_29/packages/ti/sdo/fc/ecpy/lib/release/ecpy.ae674<ecpy_impl.oe674>

>>> This error is a result of not using RTSC to build. This structure is created automatically by the RTSC configuration. If you look at ecpy.h, it declares this structure as an extern. You can create this structure in your main.c file and initialize it with your own allocation functions.

First of all I wanted to ask for some documentation about this connection and interface between h264 encoder library and ecpy library and what actions should I do in order to make it work: define and fill structures, initialize edma, etc.

>>> I'm not sure if the codec documents any information specifically about how to set up to use ECPY. But in general, if you create/populate the ECPY_CFG_PARAMS structure, you should be set to use ECPY.

Which ecpy library should I use? In the H.264 encoder sample application (which by the way requires many changes in order to be compiled on linux) I saw ecpy.ae674 usage.

Is it complatible with c66?

>>> Yes it is compatible.

Whats the differences in edma initialization that I should do?

Who is responsible for edma initialization in the framework and how can it be done?

>>> The responsibility of EDMA initialization depends on who all are DMA users in the system. If your app (that uses FC ??) are the sole users of DMA, then all the configuration should be handled by FC (via RTSC config or via explicit C config. in main before FC is initialized). 

The initialization handles several things:-

- Configuring/setting up the EDMA3 LLD to manage resources.

- Distributing resources among different scratch groups depending on your resource usage

- Setting up priorities etc for event queues/TCs etc

All this is easily handled via config, but doing this in C requires some extra bit of work (esp in the release you are using).

As I understand there is another library called RMAN than can manage it. Can I use my own code that manage edma channels instead?

>>> RMAN is a top-level resource manager library that queries/grants all IRES resources that are requested by the codec. In turn it delegates resource management to different resource managers for different type of resources.The DMA resource manager (that gets engaged in response to a request of type IRES_EDMA3CHAN), communicates with the EDMA3 LLD to be able to return these resources to the algorithm. ECPY is the library that is used by the codec to perform DMA transfers using the the IRES EDMA3CHAN resource handles it has been granted.

If you are not tied down to the version of FC to use, maybe you can consider moving to a more recent version  (specifically 3.23.01.14). This release has much better support for makefile-based examples, and I could share an example with you specifically for C6678 that demonstrates all the configuration that needs to be done in a "C" file to set up transfers.

Thanks,

Oleg Fomenko

Hi Gunjan,

Thank you for reply.

We haven't used any FC libraries on c64+ since the codecs on c64+ that we used didn't require it.

Actually we are already planning to migrate to sys/bios and rtsc and it is in our work plan but this will take a while and before migrating to sys/bios I must successfully integrate c66x h.264 codec.

I found the right version of ecpy by looking at command line parameters of sample application linking process. I used this old version of FC just because it was used in the encoder sample application. I have also all newer components like CGT, FC, XDCtools, XDAIS, but the sample application got an error in linking with the newer versions so I just installed all versions used by the sample. This sample is actually pretty old, it still uses CCS 4.

I'm absolutely OK with using the last version of FC and it will help me a lot if you share with me a stand alone C example without rtsc and sys/bios that initializes all that is required in order to use ecpy (so that I'll be able to use h.264 codec).

If you have an example of IRES edma manager without rtsc and sys/bios I'll be glad to have it also.

Thanks,

Oleg Fomenko

Please note that my example uses makefile and "C" code to configure FC, but it is STILL dependent on SYS/BIOS. It requires a "cfg" file to configure BIOS and calls "configuro" from the makefile. I'm using this to demonstrate  how you can configure ECPY and other DMA related libraries minus the cfg file.

Here's a link to the release:-

http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/fc/3_23_01_14/index_FDS.html.

You can look at the release notes to see the versions of dependent components to be used.

It includes examples for C6472 etc but due to an oversight, it doesn't include the C6678 example. Let me add you as a friend and try and share that example with you directly.

I just saw Hongmei's reply above, all those hints are very useful. Maybe that, in combination with the example I'll share with you, will help you proceed.

I tried sharing the example with you, let me know if you received it.

Yes, I've received it, 

Now I'm trying to understand how does it work

thanks,

Oleg

Hi,

I'm trying to create my own project without sys/bios

But I'm getting link error for undefined symbols:

Diags_setMask ./main.obj
FCSettings_init ./main.obj

I included the following libraries to the linker that I found in your sample link command(I used c64+ libs instead of those that I don't have in my FC 3.23 version:

-l"ti/sdo/fc/rman/lib/debug/rman.a64P"

-l"ti/sdo/fc/ires/edma3chan/lib/debug/edma3Chan.a64P"

-l"ti/sdo/fc/ires/nullresource/lib/debug/nullres.a64P"

-l"ti/sdo/fc/edma3/lib/debug/edma3.a64P"
-l"ti/sdo/edma3/rm/lib/c6678-evm/66/debug/edma3_lld_rm.ae66"

-l"ti/sdo/fc/dskt2/lib/debug/dskt2.a64P"
-l"ti/sdo/fc/utils/osalsupport/lib/debug/osal_support.a64P"

What's wrong with my project?

Hi Oleg,

As Gunjan mentioned earlier, the example project she provided "is STILL dependent on SYS/BIOS" and "requires a "cfg" file to configure BIOS and calls "configuro" from the makefile". IMHO, migrating your project to use SYS/BIOS shall be the first step.

Is your project a CCS project or based on makefile? Migrating from C64x non-SYS/BIOS to C66x SYS/BIOS can be a half-day effort according to our experience on creating C6678 video codec unit test applications. Please let us know if any help is needed for this migration.

Thanks,

Hongmei

Hi Hongmei,

Actually our project is very big and complicated and it didn't use sys/bios on C64+ chips.

It is a great effort to migrate to sys/bios and it can not be done right now.

I created an empty test project with CCS 5.1.1

Thanks,

Oleg

Hi Hongmei and Gunjan,
I thought about the option of migrating to sys/bios a little more I think now that it may be possible.
Our project has its own framework and scheduler, but the scheduler does not perform any context switch, so I can tell that our project is totally single threaded.
I thought about an option to simply run our scheduler in a single sys/bios task that will be the only task in the system.
So I need help here with understanding several aspects:
1) Right now our framework performs all initializations of HW like PLLs, timers, DDR, etc. using CSL library. If I use sys/bios will I still be responsible for these initializations or sys/bios will perform it automatically. If sys/bios performs it, how do I configure the required parameters? For now our framework initializes PLLs, timers and L2 cache, L1 cache is initialized from the GEL file on C6678 evm.
2) We use our own ethernet driver that uses qmss, cppi and Packet Accelerator functionalities from PDK package. It works in polling, no interrupts are used. Is there any problem to continue using this code? As I understood from sys/bios user's guide it is strongly not recommended to use CSL while using sys/bios.
3) If I run all my code as a single task (that never ends), are there any context switches possible in the system. For now our code does not use interrupts at all. Will sys/bios enable any interrupts in the system and use it somehow?
4) We run the same code on all 8 cores and each core uses 2 64bit timers in 32bit mode (4 32bit timers per core), in this scenario there are no free timers left in the system, all 16 64bit timers are used. Does sys/bios use any of the hw timers?
5) If I use xdctools (rtsc), the configuro utility generates its own link command automatically. How can I change the location of sections in this link command and how can I add my own sections to it?
6) When the development process comes to migration from evm to our real board, what are the steps that should be done? How can I make the xdctools to generate code for my own platform?

Thanks for your help,
Oleg

Hi Oleg,

Please see below inline. For the sys/bios migration, we recommend MCSDK Video 2.1 (http://software-dl.ti.com/sdoemb/sdoemb_public_sw/mcsdk_video/latest/index_FDS.html) codec test framework (build sv04) and H264BP encoder unit test application as references.

Related files in H264BP encoder unit test:
1) .cfg and linker command file:

C66x_h264venc_01_24_00_01_ELF\packages\ti\sdo\codecs\h264venc\App\Client\Build\TestAppEncoder: H264VEncApp.cmd, H264VEncApp6678.cfg

2) Custom platform package:

C66x_h264venc_01_24_00_01_ELF\packages\ti\sdo\codecs\h264venc\App\Client\Build\Repository\Packages

3) BIOS_start() and creating task in main:

C66x_h264venc_01_24_00_01_ELF\packages\ti\sdo\codecs\h264venc\App\Client\Test\src\TestAppEncoder.c

Related files in MCSDK Video 2.1 sv04
1) .cfg and custom platform: dsp\ggcfg\build\hdg\sv04\bios
2) Application linker command file: dsp\ggcfg\build\hdg\sv04\ggvf0.becmd
3) Use configuro tool to compile and then link the bios configuration package: dsp\mkrel\c64x\makegg, search "configuro" and find related makefile commands
4) XDC startup reset function startup_reset(): dsp\hw\c64x\startupb.c
5) BIOS_start() and the single task (siuVctRunTask()) in sv04: dsp\siu\vct\siuVctRun2.c
6) HWI (timer ISR is the only one used in sv04 to trigger packet polling): dsp\hal\app_ints\halisr.c: hal_route_interrupt ()
7) Files dependent on BIOS, including FC: dsp\siu\osal\bios6

--------------------------------------------------

I thought about an option to simply run our scheduler in a single sys/bios task that will be the only task in the system. 

[>>> Yes, you can create a single sys/bios task. Simply call "BIOS_start()" in main(). Task can be created either in .cfg file or in .c before calling BIOS_start(). sv04 creates the task (siuVctRunTsk) in .cfg. For the latter, we can refer to H264BP encoder unit test application.]

1) Right now our framework performs all initializations of HW like PLLs, timers, DDR, etc. using CSL library. If I use sys/bios will I still be responsible for these initializations or sys/bios will perform it automatically. If sys/bios performs it, how do I configure the required parameters? For now our framework initializes PLLs, timers and L2 cache, L1 cache is initialized from the GEL file on C6678 evm.

[>>> The SYS/BIOS Startup Sequence can be found from BIOS user guide. You can keep your current way of HW initialization. Use the C6678 EVM gel file for HW initialization, and then load the .out file.]

2) We use our own ethernet driver that uses qmss, cppi and Packet Accelerator functionalities from PDK package. It works in polling, no interrupts are used. Is there any problem to continue using this code? As I understood from sys/bios user's guide it is strongly not recommended to use CSL while using sys/bios.

[>>> You can continue to use the polling mode. BTW, how does your application determine when to do polling? In MCSDK Video sv04, timer ISR is used to trigger packet polling every 1ms. Are you using something similar?]

3) If I run all my code as a single task (that never ends), are there any context switches possible in the system. For now our code does not use interrupts at all. Will sys/bios enable any interrupts in the system and use it somehow?

[>>> As part of SYS/BIOS startup, hardware interrupts will be enabled. However, if the application does not register ISR for the interrupts, nothing will be triggered. As described in SYS/BIOS user guide, SYS/BIOS has four thread types: HWI, SWI, Task, and Idle. After your single application task is created, Idle will be there too. For SWI, clock is enabled by default, but it can be disabled in .cfg file with "BIOS.clockEnabled = false;". So, there will be context switches, but it will be automatically handled by SYS/BIOS. Your application only needs to focus the single task created.]

4) We run the same code on all 8 cores and each core uses 2 64bit timers in 32bit mode (4 32bit timers per core), in this scenario there are no free timers left in the system, all 16 64bit timers are used. Does sys/bios use any of the hw timers?

[>>> From C6678 spec, there is a local timer for each core, and there are 8 global timers. I am assuming you are using the local timer + one global timer for each core. Can you confirm if this is correct? Besides, are you supplying ISR for the timers? How are the timers used in your current application? ]

5) If I use xdctools (rtsc), the configuro utility generates its own link command automatically. How can I change the location of sections in this link command and how can I add my own sections to it?

[>>>Besides the linker command file automatically generated from XDC, application can supply an additional linker command file, from which sections can be added and placed. References: H264BP encoder C66x_h264venc_01_24_00_01_ELF\packages\ti\sdo\codecs\h264venc\App\Client\Build\TestAppEncoder\H264VEncApp.cmd; sv04: dsp\ggcfg\build\hdg\sv04\ggvf0.becmd]

6) When the development process comes to migration from evm to our real board, what are the steps that should be done? How
can I make the xdctools to generate code for my own platform?

[>>>A custom platform can be created and used, as in sv04 (dsp\ggcfg\build\hdg\sv04\bios\platform.xs) and H264BP encoder unit
test (C66x_h264venc_01_24_00_01_ELF\packages\ti\sdo\codecs\h264venc\App\Client\Build\Repository\Packages).]

Thanks,

Hongmei

Hi,

After a week of hard work, I've ported the whole project to sys/bios, all hardware layer was replaced by sys/bios usage, and now everything is implemented according to all requirements in sys/bios user's guide.

Thank you for your help!

After that I started to integrate the codec and immediately faced a problem.

Both my application and TI H.264 BP encoder sample application cannot be built with code generation tools newer than 7.2.2, i tried also 7.3.1 and 7.4.2.

I get the following error:

<Linking>
DIAG/user_msg_api.c:241:internal fatal error #99926: (ofile_error_handler():
oleg_test.out: illegal operation: writing 0x1ffffe90 bytes to offset 0x0 in
section ".text" exceeds its formatted size (0x1aba60))

INTERNAL ERROR: /opt/ti/TI_CGT_C6000_7.4.2/bin/lnk6x aborted

This is a serious problem. Please contact Customer
Support with this message and a copy of the input file
and help us to continue to make the tools more robust.

It seems like a compatibility problem between compiler versions.
Do you have this codec compiled with a newer compiler version?

Anyway, after I started working with an old 7.2.2 version, I found out that algNumAlloc method of this codec as well as algAlloc method returns 9 when in fact 12 memory records are written. How should I handle it?

Thanks,
Oleg

Hi Oleg,

Glad to know that you have ported the project to sys/bios.

You are right, the linking error is due to compiler compatibility issue. We are updating compiler and also some other tools for C6678 codecs, and planning to get them on Web later this month. For several decoders, such as H264BPMP, H264HP, MPEG2, and MPEG4, we have codec libs with cgtool 7.4.0 and can provide you the libs if needed. Please let us know.

About algAlloc and algNumAlloc, please refer to another post for details: http://e2e.ti.com/support/embedded/multimedia_software_codecs/f/356/t/211415.aspx.

Thanks,

Hongmei

Hi Hongmei,

I'll be glad if you provide me with H264MP and HP decoders compiled with cgtools 7.4.0. Is it located on your codecs download page? or there is an older version of these codecs? BTW I have the same problem with AAC-LC decoder for C64x+, so if you can provide me with this it, i'll be fantastic.

Are you also planning to release H264BP encoder built with cgtools 7.4.0? May be you already have it, but it is not on the download page?

I have also a couple of questions (hope these will be the last ones :) )
I'm a little bit confused with all the modules that are used in H.264 encoder sample application, especially those responsible for resource management.
As I understand RMAN is the main manager who directly "talks" to the codec library to allocate the edma resources.
-edma3 LLD is used as the "end point" edma resource manager that is configured by the user and called directly by RMAN. Is that correct?
-Where is RMAN configured to work with edma3 LLD resource manager? Can I use my own edma channels manager?
-How do we configure the range of edma channels used by each core? There is a big structure named C6608_config that is defined in edmaConfig.c. Does it configures it? and how is it related to edma3 lld?
There are several modules used in the cfg file, what is the purpose of each one?
-var EDMA3CHAN = xdc.useModule('ti.sdo.fc.ires.edma3chan.EDMA3CHAN');
-var META = xdc.useModule('ti.sdo.fc.edma3.Settings');
-var BUFRES = xdc.useModule('ti.sdo.fc.ires.bufres.BUFRES');
-var EDMA3LLD = xdc.loadPackage('ti.sdo.edma3.rm');

I ask many questions, may be I missed some documentation resource where it is described. So if it is the situation, simply give me the link.

Thanks,
Oleg Fomenko

Hi Oleg,

The codec libs built with 7.4.0 are not available on Web yet. We have the decoder libs internally and attach below for your use before the Web release. H264BP encoder with 7.4.0 will be included in the coming Web release also. We can also provide you a friendly when the H264HP encoder lib is internally available (). For AAC-LC decoder, you may want to submit another post asking for the compiler upgrade.

H264BPMP decoder: 5672.h264dec_ti.zip

H264HP decoder: 4452.h264hpvdec_ti.zip

As for your questions about FC, please see below inline.

-edma3 LLD is used as the "end point" edma resource manager that is configured by the user and called directly by RMAN. Is that correct?

[Yes, it is correct.]

-Where is RMAN configured to work with edma3 LLD resource manager? Can I use my own edma channels manager?

[EDMA3 LLD Resource Manager (RM) is internally used by FC. Application does not  need to interact with EDMA3 LLD or care about how FC is interacting with EDMA3 LLD.  What's the functionality of your own EDMA channel managers? Please provide more details.]

-How do we configure the range of edma channels used by each core? There is a big structure named C6608_config that is defined in edmaConfig.c. Does it configures it? and how is it related to edma3 lld?

[Yes, C6608_config in edmaConfig.c is configuring the EDMA channels, PaRAM sets, and etc. used by individual cores. You can also refer to codec test FW (sv04): a similar but better organized EDMA region configuration array can found in dsp/siu/osal/bios6/siuFcBios6.c. This EDMA region configuration is passed through RMAN, and further down to EDMA3 LLD for EDMA resource allocation. ]

There are several modules used in the cfg file, what is the purpose of each one?
-var EDMA3CHAN = xdc.useModule('ti.sdo.fc.ires.edma3chan.EDMA3CHAN');  [EDM3CHAN module in FC]
-var META = xdc.useModule('ti.sdo.fc.edma3.Settings');                                           [EDMA Settings used in FC, such as the maximal number of EDMA channels, PaRAM sets, and etc.]
-var BUFRES = xdc.useModule('ti.sdo.fc.ires.bufres.BUFRES');  [not necessary and can be removed]
-var EDMA3LLD = xdc.loadPackage('ti.sdo.edma3.rm');                [EDMA3 LLD Resource Manager]

Thanks,

Hongmei

Here's a link to some notes/documentation about how FC handles DMA. Might be useful to look through along with Hongmei's explanations above:-

http://processors.wiki.ti.com/index.php/Dma_overview

Hi,

Thanks for your replies, it was very helpful.

Now I'm almost there, to run the encoder and see the result.

I've configured all modules and RMAN initializes successfully.

But when I try to assign resources to codec (RMAN_assignResources function) I get error code IRES_ENORESOURCE.

The configuration file is taken from H.264 encoder sample application with my additions, it is listed below.

In the beginning of main() I call Ipc_start();

Then, before using RMAN I call RMAN_init() and it also return success.

The region configuration (EDMA3_PARAMS.regionConfig) that is used in my project was also taken from the sample.

I can't understand why I still get this error...

Besides, I have a general question on RMAN:

-Does RMAN uses IPC and which modules of IPC must be configured in order to make RMAN work? (Before I started to use IPC, the RMAN_init simply crashed)

Thanks,

Oleg

BTW, if you think I should open a new post for this questions, tell me My cfg file listing:

/* Modules*/
var Startup = xdc.useModule ("xdc.runtime.Startup");
var System = xdc.useModule ("xdc.runtime.System");
var SysStd = xdc.useModule('xdc.runtime.SysStd');
System.SupportProxy = SysStd;

var Memory = xdc.useModule('xdc.runtime.Memory');

var Task = xdc.useModule ("ti.sysbios.knl.Task");
var BIOS = xdc.useModule ("ti.sysbios.BIOS");

var Settings = xdc.useModule('ti.sdo.ipc.family.Settings');
var Cache = xdc.useModule('ti.sysbios.family.c66.Cache');

/* Set up gt trace defaults: added for using ECPY */
var Program = xdc.useModule('xdc.cfg.Program');

/* specify stack size */
Program.stack = 0x4000;
Program.argSize = 0x8;

/* Exclude sections which will be placed by linker command file */
Program.sectionsExclude = "^\.const$|^\.cinit$|^\.switch$";

/* specifiy stack size for the idle task */
Task.idleTaskStackSize = 0x1000;

/* specify heap size */
BIOS.heapSize = 0x8000;

/* The following is for using BIOS IPC */
/* specify startup first function that sets local MultiProc id */
Startup.firstFxns.$add('&setLocalId');

var Ipc = xdc.useModule('ti.sdo.ipc.Ipc');
var GateMP = xdc.useModule('ti.sdo.ipc.GateMP');
var Notify = xdc.useModule('ti.sdo.ipc.Notify');

/* specify core IDs in IPC. */
var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
/* Core list */
MultiProc.setConfig(null, ["CORE0","CORE1","CORE2","CORE3","CORE4","CORE5"]);

/* Shared Memory in SL2 */
Program.global.APPNUM = -1;
Program.global.shmSL2Base = 0x0C000000;
Program.global.shmSL2Size = 0x20000;

var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion');
SharedRegion.translate = false;
SharedRegion.setEntryMeta(0,
{ base: Program.global.shmSL2Base,
len: Program.global.shmSL2Size,
ownerProcId: 0,
isValid: true,
cacheEnable: true,
cacheLineSize: 64,
name: "ipc_internal_shared_mem",
});

/* Software barrier and shared global with BIOS IPC */
var NameServer = xdc.useModule("ti.sdo.utils.NameServer");
var params = new NameServer.Params;
Program.global.barrierTable = NameServer.create("barriers", params);
Program.global.shmTable = NameServer.create("codecshm", params);

/*Added for using ECPY */
var DSKT2 = xdc.useModule('ti.sdo.fc.dskt2.DSKT2');
xdc.useModule('ti.sysbios.xdcruntime.Settings');

/* Configure heap for FC use */
var internalMemorySegment; /* Variable to identify internal memory section*/
var intHeapSize = 0x8000; /* Size to make internal heap */
internalMemorySegment = "IRAM";
Program.sectMap[".INTMEM_HEAP"] = internalMemorySegment;

var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
var heapMemParams = new HeapMem.Params();
heapMemParams.size = intHeapSize;
heapMemParams.sectionName = ".INTMEM_HEAP";
Program.global.INTMEM_HEAP = HeapMem.create(heapMemParams);

/* Configure DSKT2 heaps and scratch */
DSKT2.ALLOW_EXTERNAL_SCRATCH = false;

DSKT2.DARAM0 = "INTMEM_HEAP";
DSKT2.DARAM1 = "INTMEM_HEAP";
DSKT2.DARAM2 = "INTMEM_HEAP";

DSKT2.SARAM0 = "INTMEM_HEAP";
DSKT2.SARAM1 = "INTMEM_HEAP";
DSKT2.SARAM2 = "INTMEM_HEAP";

DSKT2.ESDATA = "INTMEM_HEAP";
DSKT2.IPROG = "INTMEM_HEAP";
DSKT2.EPROG = "INTMEM_HEAP";

DSKT2.DSKT2_HEAP = "INTMEM_HEAP";

var Semaphore = xdc.useModule('xdc.runtime.knl.SemThread');
//xdc.useModule("ti.sdo.fc.trace.gt.GT");
//xdc.useModule("ti.sdo.fc.utils.gtinfra.GTINFRA");

/*
* Configure the RMAN to be used
*/

var RMAN = xdc.useModule('ti.sdo.fc.rman.RMAN');
var EDMA3CHAN = xdc.useModule('ti.sdo.fc.ires.edma3chan.EDMA3CHAN');
var META = xdc.useModule('ti.sdo.fc.edma3.Settings');

var BUFRES = xdc.useModule('ti.sdo.fc.ires.bufres.BUFRES');
var EDMA3LLD = xdc.loadPackage('ti.sdo.edma3.rm');

RMAN.useDSKT2 = true;
RMAN.yieldSamePriority = false; //true;
RMAN.tableSize = 10;

META.controllerId = 1; /*Use EDMA instance 1 */

var ECPY = xdc.useModule('ti.sdo.fc.ecpy.ECPY');
ECPY.persistentAllocFxn = "DSKT2_allocPersistent";
ECPY.persistentFreeFxn = "DSKT2_freePersistent"

/* Switch to debug profile for all FC modules and EDMA3 LLD */
//xdc.useModule('ti.sdo.fc.global.Settings').profile = "debug";
//EDMA3LLD.profile = "debug";

var Defaults = xdc.useModule('xdc.runtime.Defaults');

var Diags = xdc.useModule('xdc.runtime.Diags');
var Error = xdc.useModule('xdc.runtime.Error');
var Log = xdc.useModule('xdc.runtime.Log');
var LoggerBuf = xdc.useModule('xdc.runtime.LoggerBuf');
var Main = xdc.useModule('xdc.runtime.Main');
//var Memory = xdc.useModule('xdc.runtime.Memory')
var SysMin = xdc.useModule('xdc.runtime.SysMin');
//var System = xdc.useModule('xdc.runtime.System');
var Text = xdc.useModule('xdc.runtime.Text');

//var BIOS = xdc.useModule('ti.sysbios.BIOS');
//var Task = xdc.useModule('ti.sysbios.knl.Task');
var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore');

//var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');

/* Create a default system heap using ti.bios.HeapMem. */
//var heapMemParams1 = new HeapMem.Params;
//heapMemParams1.size = 80000; //8192;
//heapMemParams1.sectionName = "systemHeap";
//Program.global.heap0 = HeapMem.create(heapMemParams1);

/* This is the default memory heap. */
//Memory.defaultHeapInstance = Program.global.heap0;

//var TimestampProvider = xdc.useModule('ti.sysbios.timers.timer64.TimestampProvider');
//TimestampProvider.timerId = ITimer.ANY;
//TimestampProvider.useClockTimer = false;
//TimestampProvider.common$ = Types.Common$ undefined;
var Timestamp = xdc.useModule("xdc.runtime.Timestamp");
Timestamp.SupportProxy = xdc.useModule("ti.sysbios.timers.timer64.TimestampProvider");

//cache
//var Cache = xdc.useModule('ti.sysbios.family.c66.Cache');
Cache.setMarMeta(0x80000000, 0x1f000000, Cache.PC | Cache.PCX | Cache.PFX);
Cache.setMarMeta(0x9f000000, 0x01000000, Cache.Mar_DISABLE);

//Program.sectMap["systemHeap"] = Program.platform.stackMemory;
//Program.sectMap["systemHeap"] = new Program.SectionSpec();
Program.sectMap["systemHeap"] = "DDR";

Program.sectMap["init_c64_section"] = new Program.SectionSpec();
Program.sectMap["init_c64_section"].loadSegment = "init_struct";
Program.sectMap["init_c64_section"].fill = 0;

Program.sectMap["core_private_area"] = new Program.SectionSpec();
Program.sectMap["core_private_area"].loadSegment = "IRAM";
Program.sectMap["core_private_area"].fill = 0;

Program.sectMap["core_private_pointers"] = new Program.SectionSpec();
Program.sectMap["core_private_pointers"].loadSegment = "IRAM";
Program.sectMap["core_private_pointers"].fill = 0;

Program.sectMap["none_cached_memory"] = "DDR_NONCACHED";

Program.sectMap["samples_buffers"] = "DDR";
Program.sectMap["samples_double_buffers"] = "IRAM";
Program.sectMap["rx_socket_buffers"] = "DDR";
Program.sectMap["tx_socket_buffers"] = "DDR";
Program.sectMap["voice_test_mode"] = "DDR_NONCACHED";
Program.sectMap["udp2socket_table"] = "DDR_NONCACHED";
Program.sectMap["reliableObjTable"] = "DDR";
Program.sectMap["suSocketTable"] = "DDR";
Program.sectMap["control_channel"] = "IRAM";
Program.sectMap["pmd_database"] = "IRAM";
Program.sectMap["PMDGlobalTxBuff"] = "IRAM";
Program.sectMap["PMDDetectTxBuff"] = "IRAM";
Program.sectMap["PMDRelPRTxBuff"] = "DDR";
Program.sectMap["PMDControlResponseBuff"] = "DDR";
Program.sectMap["PMDRelPRObj"] = "DDR";
Program.sectMap["smp_detect_internal_object"] = "IRAM";
Program.sectMap["smp_detect_external_object"] = "DDR";
Program.sectMap["api_bit_masks"] = "IRAM";
Program.sectMap["api_structures"] = "DDR";
Program.sectMap["modem_external_obj"] = "DDR";
Program.sectMap["extern_filters"] = "DDR";
Program.sectMap["apr_external_objects"] = "DDR";
Program.sectMap["video_external_objects_64mb"] = "DDR";
Program.sectMap["video_external_objects_128mb"] = "DDR";
Program.sectMap["video_external_objects_256mb"] = "DDR";
Program.sectMap["vtb_global_scratch_mem"] = "DDR";
Program.sectMap["video_codec_scratch_iram"] = "IRAM";
Program.sectMap["svc_scratch"] = "IRAM";
Program.sectMap["ID_CONSTS"] = "IRAM";
Program.sectMap["sdram"] = "DDR_NONCACHED";
Program.sectMap["record_samples"] = "DDR";
Program.sectMap["cached_sdram"] = "DDR";
Program.sectMap["shared_mem_SL2"] = "MSMCSRAM";
//Program.sectMap[".neardata"] = "IRAM";
//Program.sectMap[".rodata"] = "IRAM";
Program.sectMap[".fardata"] = "DDR";
Program.sectMap["core_data0"] = "DDR";
Program.sectMap["core_data1"] = "DDR";
Program.sectMap["core_data2"] = "DDR";
Program.sectMap["core_data3"] = "DDR";
Program.sectMap["core_data4"] = "DDR";
Program.sectMap["core_data5"] = "DDR";
Program.sectMap["core_data6"] = "DDR";
Program.sectMap["core_data7"] = "DDR";
Program.sectMap["only_used_by_core_0_cached_data"] = "DDR";
Program.sectMap[".ppdata"] = "MSMCSRAM";
Program.sectMap[".qmss"] = "MSMCSRAM";
Program.sectMap[".cppi"] = "MSMCSRAM";
Program.sectMap[".sharedDDR"] = "MSMCSRAM";
Program.sectMap[".cppiMemTX"] = "MSMCSRAM";
Program.sectMap[".cppiMemRX"] = "MSMCSRAM";
Program.sectMap[".init_array"] = "MSMCSRAM";
Program.sectMap["internalSharedMem"] = "MSMCSRAM";
//Program.sectMap["bootload"] = "boot";
Program.sectMap[".csl_vect"] = "IRAM";
Program.sectMap["video_codec_internal_scratch"] = "IRAM";

Hi Oleg,

Glad to know that you have made good progress. 

First, answer your question about RMAN-IPC:

-Does RMAN uses IPC and which modules of IPC must be configured in order to make RMAN work? (Before I started to use IPC, the RMAN_init simply crashed)

[To my best knowledge, RMAN does not have dependency on IPC. In MCSDK Video and H264BP encoder unit test, IPC is used to achieve communication and/or synchronization of multiple cores, such as MessageQ based core-core communication and software barrier to for multi-core codec sync up. The failure with RMAN_init can be due to other reasons, such as incorrect memory placement].

Second, as for the failure for RMAN_assignResouces, which set of tools and codecs are you using? We did observe this kind of failure when using cgtool 7.2.4 in application with codecs built with 7.4.0. A useful tool to debug RMAN failure is to enable and use FC trace. Please refer to http://processors.wiki.ti.com/index.php/Trace_in_Framework_Components for how to do it.

Third, there are a few changes needed in your .cfg file:

1) MultiProc.setConfig(null, ["CORE0","CORE1","CORE2","CORE3","CORE4","CORE5"]); --> need to include "CORE6" and "CORE7" if all the 8 cores on C6678 are used in your application.

2) var BUFRES = xdc.useModule('ti.sdo.fc.ires.bufres.BUFRES'); --> can be removed

3) Program.sectMap[".fardata"] = "DDR"; Program.sectMap["systemHeap"] = "DDR"; --> these two sections need to be placed in local L2. This can be the reason of RMAN_init failure you saw.

Thanks,

Hongmei

4336.app.cfg

Hi Hongmei,

You were right, after I did the memory locations changes as you advised, RMAN_init works also without IPC.

Regarding the RMAN_assignResouces failure:
I use:

FC 3.23.1.14
EDMA3 LLD 2.11.5
MCSDK PDK TMS3206678 1.1.1.4 (for our ethernet driver)
SYS/BIOS 6.33.6.50
XDC tools 3.23.4.60
H.264 Baseline encoder for C66 ver. 1.24.00.01

I tried to activate FC trace but I didn't see anything on my console output. It is supposed to be there? How do I get these traces?
Attached is my updated cfg file after adding the FC trace.

Thanks,
Oleg

I also forgot to mention that I use cgtools version 7.2.2 because with newer compiler I get some internal linker error. (I wrote about it earlier)

Can it cause the problem?

Hi Oleg,

The RMAN_assignResouces failure can be due to mismatch of tools. XDC/BIOS/IPC used by the encoder and the framework are not matching. Is it possible for you to try the decoders we shared before which are built with newer version of XDC/BIOS/IPC? We are in the final stage of releasing H264BP encoder. We will send you an updated H264BP encoder lib once it is available. If it is possible, please provide your c file(s) with EDMA configuration array and RMAN calls so that we can take a look.

For the FC trace, it is supposed to display on console. Are you able to see your own printf() in console? Details about enabling FC trace is in the wiki page mentioned earlier: http://processors.wiki.ti.com/index.php/Trace_in_Framework_Components. Note that there are changes needed in both .cfg and .c files (where you have RMAN calls). In your .cfg file, there is "Defaults.common$.logger = logger0;" at the end while FC trace wiki uses "Defaults.common$.logger = LoggerSys.create(LoggerSysParams);".  Not sure if this is causing the issue with FC trace not displayed.

Thanks,

Hongmei

2677.edma_config.cHi,
If you have any working application with h.264 encoder, can you send me the versions of all components from the project? so I will check with these exact versions and will find out if this is the problem.

-framework components

-ipc

-sys/bios

-edma lld

For some reason I can't find out which version of edma lld is used in the sample application, it is nor in the project neither in the link command file...
For edma lld configuration I use the exact configuration from H.264 encoder sample without any change. It is attached
I still didn't find out why FC traces don't work, I'm working on it.

Thanks,
Oleg

Hi,

I finally succeeded to get traces from FC:

I use the following components in my project:

-CGT 7.2.2

-XDCTools 3.20.8.88

-FC 3.20.2.29

-MCSDK 1.1.1.4

-SYS/BIOS 6.31.0.18

-H.264 BP encoder ver 01.24.00.01

-edma configuration file is taken from this encoder sample application without any changes.

Attached is the log from FC

I get "Error creating Resource Manager object" error. Do you have any ideas where is it coming from?

I wish you happy new year!

Oleg

3326.fc_trace.txt

Hi Oleg,

Most likely this error is stemming from the fact that the FC release you are using doesn't support C6678 (Check your release notes:- framework_components_3_20_02_29/framework_components_3_20_02_29_ReleaseNotes.html#Compatibility). 

C6678 was first supported in framework_components_3_21_00_25 release (and EDMA3 LLD version 02.11.02.04). However if you are considering upgrading versions, I'd suggest you move to the most recent 3.23 release available here:-

http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/fc/index.html

We are constantly improving examples and you might get some bug fixes as well.

Thanks, and wish you a Happy New Year as well.

Gunjan

Hi Oleg,

Attached below please find H264BP encoder lib which is built on an updated set of tools:

6747.h264venc_ti.zip

Code generation tools version 7.4.0

SYS/BIOS version 6.33.04.39,
Bios IPC version 1.24.02.27,
XDC Tools version 3.23.02.47,
XDAIS Tools version 7.22.00.03,
EDMA3 LLD version 02.11.05.02 &
Framework Component (FC) version 3.22.03.09

Please let us know if you see any issues when integrating this new lib.

Thanks and happy new year,

Hongmei

Hi!

Thank you for the new library, I appreciate that you send it to me before it is available on the web.

Do you also have any working sample application for this library?

I tried the new library with exact versions of all components as you wrote and now I get the following error:

[t=0x00000001:ab95a5f1] ti.sdo.fc.ires.edma3chan: [+7] IRESMAN_EDMA3CHAN_getHandles> Could not allocate 2 contiguous paRams starting from 1010

5238.FC_traces.txt4520.edma_config.c

Attached is the full log of FC traces and my edma3 configuration. 

Can you tell me why I cannot allocate the required edma3 resources?

Thanks,

Oleg

I can't tell from just these two files what regions you are using or what other configurations are being used (Maybe there's a cfg file that you can share). It seems like it is unable to allocate "any two contiguous PaRAMs."

Need to know more about your configuration (which physical id of EDMA is being used, and what region number is being used) to figure out why this particular request is failing.

Hi Gunjan,

-First of all right now I run this application only on core 0.

-Before calling RMAN_init(), I perform the following statement :

EDMA3_PARAMS.regionConfig = &surf_edma_C6678_config[1][DNUM];

-surf_edma_C6678_config structure is defined in the c file I attached in my previous post.

-So edma instance number 1 is being used together with region number 0 (I use only core 0)

-cfg file is attached also:

2248.app.cfg

In your cfg file, I don't see EDMA resources being assigned to individual scratch groups. I would have expected to see something like this:-

META.maxPaRams[scratchId] = 4;
META.maxTccs[scratchId] = 2;
META.maxEdmaChannels[scratchId] = 2;
META.maxQdmaChannels[scratchId] = 0; 

where scratchId is the scratch group # being used (0 for your use-case per the FC trace), and the RHS values are the actual number of PaRAMS, TCCs and EDMA channels required for functioning of your algorithm. 

If you don't have the above lines in your cfg file, no resources are set aside for use by a particular scratch group and hence all resource allocations will fail.

http://processors.wiki.ti.com/index.php/Configuration_of_EDMA3_RM_in_Framework_Components

Let me know if  you need further clarification.

Hi,

I added the following strings to the cfg file

META.maxPaRams[0] = 32;
META.maxTccs[0] = 8;
META.maxEdmaChannels[0] = 8;
META.maxQdmaChannels[0] = 0;

Now I get much more traces and it seems like there is some kind of improvement, but in the end the same error,

attached is the updated traces file

1588.FC_traces.txt

BTW, I didn't find these definitions in the original sample application.

If you could give me some kind of working reference it would be much easier to debug it.

Thanks,

Oleg

I am not familiar with the codec, maybe Hongmei could share more information regarding that. I am trying to provide generic help regarding Framework Components configuration etc.

Hi Oleg,

Can you please provide the file(s) which have the RMAN calls, including RMAN_Init and RMAN_AssignResource? From the information you provided, it looks like you may have taken FC changes from both codec unit test and MCSDK Video sv04: .cfg from unit test, edmaConfig and RMAN calls in .c from MCSDK Video. There can be some mismatch. For example, the scratch ID in unit test is -1, and therefore there is no need to specify "META.maxPaRams[0], ..." in .cfg. However, scratch ID is 0 in sv04, and you can find "META.maxPaRams[0], ..." in dsp/ggcfg/build/sv04/bios/bios6.cfg.

As for the sample application for the new H264BP encoder lib, you can try it with the unit test from the web-Publishing release. The only change I am expecting is updating the tool version of the unit test CCS project and then linking with the new lib.

Thanks,

Hongmei

Just as an experiment I created an example that uses the same configuration as you do (regionSample1) and the same FC/LLD versions and similar EDMA requests from a dummy algorithm and I did not get the same errors that you did. All the PaRAM allocations were successful (see attached 5270.fclog.txt )

[TMS320C66x_0] [t=0x00c333f4] ti.sdo.fc.edma3: [+2] EDMA3_getResourceManager> Return system Resource Manager handle

[TMS320C66x_0] [t=0x00c39c91] ti.sdo.fc.edma3: [+X] EDMA3_getResourceManager> Exit (handle=0x83d170)

[TMS320C66x_0] [t=0x00c3fa2e] ti.sdo.fc.ires.edma3chan: [+2] IRESMAN_EDMA3CHAN_getHandles> DCHMAP exists on device 

[TMS320C66x_0] [t=0x00c46428] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> Contiguous PaRams requested

[TMS320C66x_0] [t=0x00c508a6] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> Obtained 23 PaRams starting at 73 

[TMS320C66x_0] [t=0x00c581c8] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> Obtained TCC 3

[TMS320C66x_0] [t=0x00c5e273] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> DCHMAP exists on device

[TMS320C66x_0] [t=0x007407ad] ti.sdo.fc.rman: [+E] RMAN_assignResources> Enter (alg=0x1085a918, resFxns=0x858ad4, scratchGroupId=-1)[TMS320C66x_0] [t=0x0074860b] ti.sdo.fc.dskt2: [+E] DSKT2_allocPersistent> Enter (numRecs=1)[TMS320C66x_0] [t=0x0074da51] ti.sdo.fc.dskt2: [+E] _DSKT2_init> Enter[TMS320C66x_0] [t=0x007518c9] ti.sdo.fc.dskt2: [+X] _DSKT2_init> Exit[TMS320C66x_0] [t=0x00755707] ti.sdo.fc.dskt2: [+E] _DSKT2_assignInstanceMemory> Enter (scratchId=-1, numRecs=1, extHeap=0x858e10)[TMS320C66x_0] [t=0x0075d1d0] ti.sdo.fc.dskt2: [+E] _DSKT2_allocateInDesignatedSpace> Enter (index=0, ialgSpace=IALG_EXTERNAL, extHeap=0x858e10)[TMS320C66x_0] [t=0x00765e2f] ti.sdo.fc.dskt2: [+X] _DSKT2_allocateInDesignatedSpace> Exit (returnVal=1)[TMS320C66x_0] [t=0x0076be24] ti.sdo.fc.dskt2: [+2] _DSKT2_assignInstanceMemory> memTab[0] allocated in persistent memory in Memory space:IALG_EXTERNAL. Addr=0x85adb8[TMS320C66x_0] [t=0x007759a1] ti.sdo.fc.dskt2: [+X] _DSKT2_assignInstanceMemory> Exit (returnVal=1)[TMS320C66x_0] [t=0x0077b420] ti.sdo.fc.dskt2: [+X] DSKT2_allocPersistent> Exit (status=1)[TMS320C66x_0] [t=0x00780cc6] ti.sdo.fc.ires.edma3chan: [+E] IRESMAN_EDMA3CHAN_getProtocolName> Enter[TMS320C66x_0] [t=0x007868b7] ti.sdo.fc.ires.edma3chan: [+X] IRESMAN_EDMA3CHAN_getProtocolName> Exit (name=ti.sdo.fc.ires.edma3chan)[TMS320C66x_0] [t=0x0078e2ad] ti.sdo.fc.ires.edma3chan: [+E] IRESMAN_EDMA3CHAN_getProtocolRevision> Enter[TMS320C66x_0] [t=0x00794244] ti.sdo.fc.ires.edma3chan: [+X] IRESMAN_EDMA3CHAN_getProtocolRevision> Exit (version=(2.0.0))[TMS320C66x_0] [t=0x0079b534] ti.sdo.fc.rman: [+2] RMAN_assignResources> Call getHandle on the IRESMAN implementation 0x858f18[TMS320C66x_0] [t=0x007a2e68] ti.sdo.fc.ires.edma3chan: [+E] IRESMAN_EDMA3CHAN_getHandles> Enter (protocolArgs=0x1085a934, scratchGroupId=-1)[TMS320C66x_0] [t=0x007ab39b] ti.sdo.fc.edma3: [+E] EDMA3_getResourceManager> Enter (alg=0x1085a918, scratchGroupId=-1)[TMS320C66x_0] [t=0x007b235a] ti.sdo.fc.edma3: [+2] EDMA3_getResourceManager> Initializing EDMA3 Meta config module[TMS320C66x_0] [t=0x007b8bff] ti.sdo.fc.edma3: [+E] edma3Init> Enter[TMS320C66x_0] [t=0x007bc8b5] ti.sdo.fc.edma3: [+2] edma3Init> Initializing table of Resource Manager handles[TMS320C66x_0] [t=0x007c7743] ti.sdo.fc.edma3: [+2] edma3Init> Create Resource Manager object[TMS320C66x_0] [t=0x007fa694] ti.sdo.fc.edma3: [+X] edma3Init> Exit (status=1)[TMS320C66x_0] [t=0x007fed37] ti.sdo.fc.edma3: [+2] EDMA3_getResourceManager> Creating semaphore for System Resource Manager Handle[TMS320C66x_0] [t=0x00807406] ti.sdo.fc.edma3: [+2] EDMA3_getResourceManager> Opening System Resource Manager Handle[TMS320C66x_0] [t=0x0080de27] ti.sdo.fc.edma3: [+E] openRMHandle> Enter (scratchId=-1, sem=0x837a48)[TMS320C66x_0] [t=0x00813b96] ti.sdo.fc.edma3: [+2] openRMHandle> System RM handle requested[TMS320C66x_0] [t=0x0081a964] ti.sdo.fc.edma3: [+X] openRMHandle> Exit (handle=0x83d170)[TMS320C66x_0] [t=0x0081fc74] ti.sdo.fc.ires.edma3chan: [+2] IRESMAN_EDMA3CHAN_getHandles> DCHMAP exists on device [TMS320C66x_0] [t=0x0082668e] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> Contiguous PaRams requested[TMS320C66x_0] [t=0x0082ebce] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> Obtained 3 PaRams starting at 64 [TMS320C66x_0] [t=0x0083636d] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> Obtained TCC 0[TMS320C66x_0] [t=0x0083c428] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> DCHMAP exists on device[TMS320C66x_0] [t=0x00842c24] ti.sdo.fc.ires.edma3chan: [+2] IRESMAN_EDMA3CHAN_getHandles> EDMA Channel ANY requested with 1 TCC ANY.[TMS320C66x_0] [t=0x0084a99f] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> Obtained Edma channel 0[TMS320C66x_0] [t=0x0085128e] ti.sdo.fc.dskt2: [+E] DSKT2_allocPersistent> Enter (numRecs=1)[TMS320C66x_0] [t=0x008566c8] ti.sdo.fc.dskt2: [+E] _DSKT2_init> Enter[TMS320C66x_0] [t=0x0085a552] ti.sdo.fc.dskt2: [+X] _DSKT2_init> Exit[TMS320C66x_0] [t=0x0085e3a4] ti.sdo.fc.dskt2: [+E] _DSKT2_assignInstanceMemory> Enter (scratchId=-1, numRecs=1, extHeap=0x858e10)[TMS320C66x_0] [t=0x00865e81] ti.sdo.fc.dskt2: [+E] _DSKT2_allocateInDesignatedSpace> Enter (index=0, ialgSpace=IALG_EXTERNAL, extHeap=0x858e10)[TMS320C66x_0] [t=0x0086eb38] ti.sdo.fc.dskt2: [+X] _DSKT2_allocateInDesignatedSpace> Exit (returnVal=1)[TMS320C66x_0] [t=0x00874b35] ti.sdo.fc.dskt2: [+2] _DSKT2_assignInstanceMemory> memTab[0] allocated in persistent memory in Memory space:IALG_EXTERNAL. Addr=0x85adf8[TMS320C66x_0] [t=0x0087e6cc] ti.sdo.fc.dskt2: [+X] _DSKT2_assignInstanceMemory> Exit (returnVal=1)[TMS320C66x_0] [t=0x00884153] ti.sdo.fc.dskt2: [+X] DSKT2_allocPersistent> Exit (status=1)[TMS320C66x_0] [t=0x008894e4] ti.sdo.fc.ires.edma3chan: [+E] IRES_EDMA3CHAN_getNumMemRecs> Enter (protArgs=0x1085a934)[TMS320C66x_0] [t=0x008902fb] ti.sdo.fc.ires.edma3chan: [+X] IRES_EDMA3CHAN_getNumMemRecs> Exit (Num=1)[TMS320C66x_0] [t=0x00896135] ti.sdo.fc.ires.edma3chan: [+E] IRES_EDMA3CHAN_getMemRecs> Enter (handle=0x0, resProtocolArgs=0x1085a934, memRecs=0x84b9a8)[TMS320C66x_0] [t=0x0089f235] ti.sdo.fc.ires.edma3chan: [+4] IRES_EDMA3CHAN_getMemRecs> Amount of memory requested 0x48, alignment 0x4, space IALG_EXTERNAL attrs IALG_PERSIST[TMS320C66x_0] [t=0x008a93fb] ti.sdo.fc.ires.edma3chan: [+X] IRES_EDMA3CHAN_getMemRecs> Exit (status=IRES_EOK)[TMS320C66x_0] [t=0x008af819] ti.sdo.fc.dskt2: [+E] DSKT2_allocPersistent> Enter (numRecs=1)[TMS320C66x_0] [t=0x008b4c44] ti.sdo.fc.dskt2: [+E] _DSKT2_init> Enter[TMS320C66x_0] [t=0x008b8ac4] ti.sdo.fc.dskt2: [+X] _DSKT2_init> Exit[TMS320C66x_0] [t=0x008bc8f8] ti.sdo.fc.dskt2: [+E] _DSKT2_assignInstanceMemory> Enter (scratchId=-1, numRecs=1, extHeap=0x858e10)[TMS320C66x_0] [t=0x008c43af] ti.sdo.fc.dskt2: [+E] _DSKT2_allocateInDesignatedSpace> Enter (index=0, ialgSpace=IALG_EXTERNAL, extHeap=0x858e10)[TMS320C66x_0] [t=0x008ccfea] ti.sdo.fc.dskt2: [+X] _DSKT2_allocateInDesignatedSpace> Exit (returnVal=1)[TMS320C66x_0] [t=0x008d2fe7] ti.sdo.fc.dskt2: [+2] _DSKT2_assignInstanceMemory> memTab[0] allocated in persistent memory in Memory space:IALG_EXTERNAL. Addr=0x85ae10[TMS320C66x_0] [t=0x008dcb6c] ti.sdo.fc.dskt2: [+X] _DSKT2_assignInstanceMemory> Exit (returnVal=1)[TMS320C66x_0] [t=0x008e25f3] ti.sdo.fc.dskt2: [+X] DSKT2_allocPersistent> Exit (status=1)[TMS320C66x_0] [t=0x008e795d] ti.sdo.fc.ires.edma3chan: [+E] IRES_EDMA3CHAN_constructHandle> Enter (protArgs=0x1085a934, memRecs=0x84b9a8, constructHandleArgs=0x85adf8)[TMS320C66x_0] [t=0x008f1af1] ti.sdo.fc.ires.edma3chan: [+2] IRES_EDMA3CHAN_constructHandle> Address of handle 0x85ae10, paRamIndices 0x85ae50, paRamAddresses 0x85ae44, shadowParams 0x0, tccIndices 0x85ae56, edmaChannel 0[TMS320C66x_0] [t=0x008ff0cd] ti.sdo.fc.ires.edma3chan: [+2] IRES_EDMA3CHAN_constructHandle> Num params 3, Num Tccs 1, Qdma channel 518 Edma channel 0[TMS320C66x_0] [t=0x0090802a] ti.sdo.fc.ires.edma3chan: [+2] IRES_EDMA3CHAN_constructHandle> ESR 0x0: 0x1 IPR 0x0: 0x1 [TMS320C66x_0] [t=0x0090f041] ti.sdo.fc.ires.edma3chan: [+X] IRES_EDMA3CHAN_constructHandle> Exit (status=0, handle=0x85ae10)[TMS320C66x_0] [t=0x0091658f] ti.sdo.fc.dskt2: [+E] DSKT2_freePersistent> Enter (numRecs=1)[TMS320C66x_0] [t=0x0091b955] ti.sdo.fc.dskt2: [+E] _DSKT2_freeAllocatedMemory> Enter (scratchMutexId=-1, number=1, extHeap=0x858e10)[TMS320C66x_0] [t=0x0092366a] ti.sdo.fc.dskt2: [+E] _DSKT2_isSharedScratchAddr> Enter (scratchMutexId=-1, addr=0x85adf8)[TMS320C66x_0] [t=0x0092a670] ti.sdo.fc.dskt2: [+X] _DSKT2_isSharedScratchAddr> Exit (status=FALSE)[TMS320C66x_0] [t=0x00930371] ti.sdo.fc.dskt2: [+X] _DSKT2_freeAllocatedMemory> Exit (returnVal=1)[TMS320C66x_0] [t=0x00935d2b] ti.sdo.fc.dskt2: [+X] DSKT2_freePersistent> Exit[TMS320C66x_0] [t=0x0093a3a6] ti.sdo.fc.ires.edma3chan: [+X] IRESMAN_EDMA3CHAN_getHandles> Exit (handle=0x85ae10, status=IRES_OK)[TMS320C66x_0] [t=0x00941fa3] ti.sdo.fc.ires.edma3chan: [+E] IRESMAN_EDMA3CHAN_getProtocolName> Enter[TMS320C66x_0] [t=0x00947b9c] ti.sdo.fc.ires.edma3chan: [+X] IRESMAN_EDMA3CHAN_getProtocolName> Exit (name=ti.sdo.fc.ires.edma3chan)[TMS320C66x_0] [t=0x0094f592] ti.sdo.fc.ires.edma3chan: [+E] IRESMAN_EDMA3CHAN_getProtocolRevision> Enter[TMS320C66x_0] [t=0x00955529] ti.sdo.fc.ires.edma3chan: [+X] IRESMAN_EDMA3CHAN_getProtocolRevision> Exit (version=(2.0.0))[TMS320C66x_0] [t=0x0095c821] ti.sdo.fc.rman: [+2] RMAN_assignResources> Call getHandle on the IRESMAN implementation 0x858f18[TMS320C66x_0] [t=0x009640a2] ti.sdo.fc.ires.edma3chan: [+E] IRESMAN_EDMA3CHAN_getHandles> Enter (protocolArgs=0x1085a94c, scratchGroupId=-1)[TMS320C66x_0] [t=0x0096c57c] ti.sdo.fc.edma3: [+E] EDMA3_getResourceManager> Enter (alg=0x1085a918, scratchGroupId =-1)[TMS320C66x_0] [t=0x0097362e] ti.sdo.fc.edma3: [+2] EDMA3_getResourceManager> Return system Resource Manager handle[TMS320C66x_0] [t=0x00979ed3] ti.sdo.fc.edma3: [+X] EDMA3_getResourceManager> Exit (handle=0x83d170)[TMS320C66x_0] [t=0x0097fc70] ti.sdo.fc.ires.edma3chan: [+2] IRESMAN_EDMA3CHAN_getHandles> DCHMAP exists on device [TMS320C66x_0] [t=0x0098666a] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> Contiguous PaRams requested[TMS320C66x_0] [t=0x0098eb46] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> Obtained 3 PaRams starting at 67 [TMS320C66x_0] [t=0x009962ef] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> Obtained TCC 1[TMS320C66x_0] [t=0x0099c39a] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> DCHMAP exists on device[TMS320C66x_0] [t=0x009a2b7f] ti.sdo.fc.ires.edma3chan: [+2] IRESMAN_EDMA3CHAN_getHandles> EDMA Channel ANY requested with 1 TCC ANY.[TMS320C66x_0] [t=0x009aa8de] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> Obtained Edma channel 1[TMS320C66x_0] [t=0x009b11be] ti.sdo.fc.dskt2: [+E] DSKT2_allocPersistent> Enter (numRecs=1)[TMS320C66x_0] [t=0x009b65f8] ti.sdo.fc.dskt2: [+E] _DSKT2_init> Enter[TMS320C66x_0] [t=0x009ba47a] ti.sdo.fc.dskt2: [+X] _DSKT2_init> Exit[TMS320C66x_0] [t=0x009be2c4] ti.sdo.fc.dskt2: [+E] _DSKT2_assignInstanceMemory> Enter (scratchId=-1, numRecs=1, extHeap=0x858e10)[TMS320C66x_0] [t=0x009c5d99] ti.sdo.fc.dskt2: [+E] _DSKT2_allocateInDesignatedSpace> Enter (index=0, ialgSpace=IALG_EXTERNAL, extHeap=0x858e10)[TMS320C66x_0] [t=0x009cea5c] ti.sdo.fc.dskt2: [+X] _DSKT2_allocateInDesignatedSpace> Exit (returnVal=1)[TMS320C66x_0] [t=0x009d4a59] ti.sdo.fc.dskt2: [+2] _DSKT2_assignInstanceMemory> memTab[0] allocated in persistent memory in Memory space:IALG_EXTERNAL. Addr=0x85adf8[TMS320C66x_0] [t=0x009de5de] ti.sdo.fc.dskt2: [+X] _DSKT2_assignInstanceMemory> Exit (returnVal=1)[TMS320C66x_0] [t=0x009e4065] ti.sdo.fc.dskt2: [+X] DSKT2_allocPersistent> Exit (status=1)[TMS320C66x_0] [t=0x009e93e0] ti.sdo.fc.ires.edma3chan: [+E] IRES_EDMA3CHAN_getNumMemRecs> Enter (protArgs=0x1085a94c)[TMS320C66x_0] [t=0x009f01e7] ti.sdo.fc.ires.edma3chan: [+X] IRES_EDMA3CHAN_getNumMemRecs> Exit (Num=1)[TMS320C66x_0] [t=0x009f6216] ti.sdo.fc.ires.edma3chan: [+E] IRES_EDMA3CHAN_getMemRecs> Enter (handle=0x0, resProtocolArgs=0x1085a94c, memRecs=0x84b9a8)[TMS320C66x_0] [t=0x009ff313] ti.sdo.fc.ires.edma3chan: [+4] IRES_EDMA3CHAN_getMemRecs> Amount of memory requested 0x48, alignment 0x4, space IALG_EXTERNAL attrs IALG_PERSIST[TMS320C66x_0] [t=0x00a094af] ti.sdo.fc.ires.edma3chan: [+X] IRES_EDMA3CHAN_getMemRecs> Exit (status=IRES_EOK)[TMS320C66x_0] [t=0x00a0f8cd] ti.sdo.fc.dskt2: [+E] DSKT2_allocPersistent> Enter (numRecs=1)[TMS320C66x_0] [t=0x00a14cf8] ti.sdo.fc.dskt2: [+E] _DSKT2_init> Enter[TMS320C66x_0] [t=0x00a18b78] ti.sdo.fc.dskt2: [+X] _DSKT2_init> Exit[TMS320C66x_0] [t=0x00a1c9ac] ti.sdo.fc.dskt2: [+E] _DSKT2_assignInstanceMemory> Enter (scratchId=-1, numRecs=1, extHeap=0x858e10)[TMS320C66x_0] [t=0x00a24475] ti.sdo.fc.dskt2: [+E] _DSKT2_allocateInDesignatedSpace> Enter (index=0, ialgSpace=IALG_EXTERNAL, extHeap=0x858e10)[TMS320C66x_0] [t=0x00a2d0c6] ti.sdo.fc.dskt2: [+X] _DSKT2_allocateInDesignatedSpace> Exit (returnVal=1)[TMS320C66x_0] [t=0x00a330c3] ti.sdo.fc.dskt2: [+2] _DSKT2_assignInstanceMemory> memTab[0] allocated in persistent memory in Memory space:IALG_EXTERNAL. Addr=0x85ae58[TMS320C66x_0] [t=0x00a3cc48] ti.sdo.fc.dskt2: [+X] _DSKT2_assignInstanceMemory> Exit (returnVal=1)[TMS320C66x_0] [t=0x00a426cf] ti.sdo.fc.dskt2: [+X] DSKT2_allocPersistent> Exit (status=1)[TMS320C66x_0] [t=0x00a47a29] ti.sdo.fc.ires.edma3chan: [+E] IRES_EDMA3CHAN_constructHandle> Enter (protArgs=0x1085a94c, memRecs=0x84b9a8, constructHandleArgs=0x85adf8)[TMS320C66x_0] [t=0x00a51bab] ti.sdo.fc.ires.edma3chan: [+2] IRES_EDMA3CHAN_constructHandle> Address of handle 0x85ae58, paRamIndices 0x85ae98, paRamAddresses 0x85ae8c, shadowParams 0x0, tccIndices 0x85ae9e, edmaChannel 1[TMS320C66x_0] [t=0x00a5f16f] ti.sdo.fc.ires.edma3chan: [+2] IRES_EDMA3CHAN_constructHandle> Num params 3, Num Tccs 1, Qdma channel 518 Edma channel 1[TMS320C66x_0] [t=0x00a67ec9] ti.sdo.fc.ires.edma3chan: [+2] IRES_EDMA3CHAN_constructHandle> ESR 0x0: 0x2 IPR 0x0: 0x2 [TMS320C66x_0] [t=0x00a6eed9] ti.sdo.fc.ires.edma3chan: [+X] IRES_EDMA3CHAN_constructHandle> Exit (status=0, handle=0x85ae58)[TMS320C66x_0] [t=0x00a76427] ti.sdo.fc.dskt2: [+E] DSKT2_freePersistent> Enter (numRecs=1)[TMS320C66x_0] [t=0x00a7b7e1] ti.sdo.fc.dskt2: [+E] _DSKT2_freeAllocatedMemory> Enter (scratchMutexId=-1, number=1, extHeap=0x858e10)[TMS320C66x_0] [t=0x00a834f6] ti.sdo.fc.dskt2: [+E] _DSKT2_isSharedScratchAddr> Enter (scratchMutexId=-1, addr=0x85adf8)[TMS320C66x_0] [t=0x00a8a4fa] ti.sdo.fc.dskt2: [+X] _DSKT2_isSharedScratchAddr> Exit (status=FALSE)[TMS320C66x_0] [t=0x00a901fb] ti.sdo.fc.dskt2: [+X] _DSKT2_freeAllocatedMemory> Exit (returnVal=1)[TMS320C66x_0] [t=0x00a95bb1] ti.sdo.fc.dskt2: [+X] DSKT2_freePersistent> Exit[TMS320C66x_0] [t=0x00a9a221] ti.sdo.fc.ires.edma3chan: [+X] IRESMAN_EDMA3CHAN_getHandles> Exit (handle=0x85ae58, status=IRES_OK)[TMS320C66x_0] [t=0x00aa1df9] ti.sdo.fc.ires.edma3chan: [+E] IRESMAN_EDMA3CHAN_getProtocolName> Enter[TMS320C66x_0] [t=0x00aa79f2] ti.sdo.fc.ires.edma3chan: [+X] IRESMAN_EDMA3CHAN_getProtocolName> Exit (name=ti.sdo.fc.ires.edma3chan)[TMS320C66x_0] [t=0x00aaf3e8] ti.sdo.fc.ires.edma3chan: [+E] IRESMAN_EDMA3CHAN_getProtocolRevision> Enter[TMS320C66x_0] [t=0x00ab537f] ti.sdo.fc.ires.edma3chan: [+X] IRESMAN_EDMA3CHAN_getProtocolRevision> Exit (version=(2.0.0))[TMS320C66x_0] [t=0x00abc675] ti.sdo.fc.rman: [+2] RMAN_assignResources> Call getHandle on the IRESMAN implementation 0x858f18[TMS320C66x_0] [t=0x00ac3ed4] ti.sdo.fc.ires.edma3chan: [+E] IRESMAN_EDMA3CHAN_getHandles> Enter (protocolArgs=0x1085a964, scratchGroupId=-1)[TMS320C66x_0] [t=0x00acc3a0] ti.sdo.fc.edma3: [+E] EDMA3_getResourceManager> Enter (alg=0x1085a918, scratchGroupId =-1)[TMS320C66x_0] [t=0x00ad343a] ti.sdo.fc.edma3: [+2] EDMA3_getResourceManager> Return system Resource Manager handle[TMS320C66x_0] [t=0x00ad9cd7] ti.sdo.fc.edma3: [+X] EDMA3_getResourceManager> Exit (handle=0x83d170)[TMS320C66x_0] [t=0x00adfa74] ti.sdo.fc.ires.edma3chan: [+2] IRESMAN_EDMA3CHAN_getHandles> DCHMAP exists on device [TMS320C66x_0] [t=0x00ae6661] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> Contiguous PaRams requested[TMS320C66x_0] [t=0x00aeeb0e] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> Obtained 3 PaRams starting at 70 [TMS320C66x_0] [t=0x00af62e5] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> Obtained TCC 2[TMS320C66x_0] [t=0x00afc390] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> DCHMAP exists on device[TMS320C66x_0] [t=0x00b02b75] ti.sdo.fc.ires.edma3chan: [+2] IRESMAN_EDMA3CHAN_getHandles> EDMA Channel ANY requested with 1 TCC ANY.[TMS320C66x_0] [t=0x00b0a8d4] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> Obtained Edma channel 2[TMS320C66x_0] [t=0x00b111b4] ti.sdo.fc.dskt2: [+E] DSKT2_allocPersistent> Enter (numRecs=1)[TMS320C66x_0] [t=0x00b165ee] ti.sdo.fc.dskt2: [+E] _DSKT2_init> Enter[TMS320C66x_0] [t=0x00b1a470] ti.sdo.fc.dskt2: [+X] _DSKT2_init> Exit[TMS320C66x_0] [t=0x00b1e2ba] ti.sdo.fc.dskt2: [+E] _DSKT2_assignInstanceMemory> Enter (scratchId=-1, numRecs=1, extHeap=0x858e10)[TMS320C66x_0] [t=0x00b25d8f] ti.sdo.fc.dskt2: [+E] _DSKT2_allocateInDesignatedSpace> Enter (index=0, ialgSpace=IALG_EXTERNAL, extHeap=0x858e10)[TMS320C66x_0] [t=0x00b2ea4a] ti.sdo.fc.dskt2: [+X] _DSKT2_allocateInDesignatedSpace> Exit (returnVal=1)[TMS320C66x_0] [t=0x00b34a47] ti.sdo.fc.dskt2: [+2] _DSKT2_assignInstanceMemory> memTab[0] allocated in persistent memory in Memory space:IALG_EXTERNAL. Addr=0x85adf8[TMS320C66x_0] [t=0x00b3e5cc] ti.sdo.fc.dskt2: [+X] _DSKT2_assignInstanceMemory> Exit (returnVal=1)[TMS320C66x_0] [t=0x00b44053] ti.sdo.fc.dskt2: [+X] DSKT2_allocPersistent> Exit (status=1)[TMS320C66x_0] [t=0x00b493ce] ti.sdo.fc.ires.edma3chan: [+E] IRES_EDMA3CHAN_getNumMemRecs> Enter (protArgs=0x1085a964)[TMS320C66x_0] [t=0x00b501d5] ti.sdo.fc.ires.edma3chan: [+X] IRES_EDMA3CHAN_getNumMemRecs> Exit (Num=1)[TMS320C66x_0] [t=0x00b56007] ti.sdo.fc.ires.edma3chan: [+E] IRES_EDMA3CHAN_getMemRecs> Enter (handle=0x0, resProtocolArgs=0x1085a964, memRecs=0x84b9a8)[TMS320C66x_0] [t=0x00b5f0ff] ti.sdo.fc.ires.edma3chan: [+4] IRES_EDMA3CHAN_getMemRecs> Amount of memory requested 0x48, alignment 0x4, space IALG_EXTERNAL attrs IALG_PERSIST[TMS320C66x_0] [t=0x00b6929b] ti.sdo.fc.ires.edma3chan: [+X] IRES_EDMA3CHAN_getMemRecs> Exit (status=IRES_EOK)[TMS320C66x_0] [t=0x00b6f6b9] ti.sdo.fc.dskt2: [+E] DSKT2_allocPersistent> Enter (numRecs=1)[TMS320C66x_0] [t=0x00b74ae4] ti.sdo.fc.dskt2: [+E] _DSKT2_init> Enter[TMS320C66x_0] [t=0x00b78964] ti.sdo.fc.dskt2: [+X] _DSKT2_init> Exit[TMS320C66x_0] [t=0x00b7c798] ti.sdo.fc.dskt2: [+E] _DSKT2_assignInstanceMemory> Enter (scratchId=-1, numRecs=1, extHeap=0x858e10)[TMS320C66x_0] [t=0x00b8424f] ti.sdo.fc.dskt2: [+E] _DSKT2_allocateInDesignatedSpace> Enter (index=0, ialgSpace=IALG_EXTERNAL, extHeap=0x858e10)[TMS320C66x_0] [t=0x00b8ce82] ti.sdo.fc.dskt2: [+X] _DSKT2_allocateInDesignatedSpace> Exit (returnVal=1)[TMS320C66x_0] [t=0x00b92e7f] ti.sdo.fc.dskt2: [+2] _DSKT2_assignInstanceMemory> memTab[0] allocated in persistent memory in Memory space:IALG_EXTERNAL. Addr=0x85aea0[TMS320C66x_0] [t=0x00b9ca04] ti.sdo.fc.dskt2: [+X] _DSKT2_assignInstanceMemory> Exit (returnVal=1)[TMS320C66x_0] [t=0x00ba248b] ti.sdo.fc.dskt2: [+X] DSKT2_allocPersistent> Exit (status=1)[TMS320C66x_0] [t=0x00ba77e5] ti.sdo.fc.ires.edma3chan: [+E] IRES_EDMA3CHAN_constructHandle> Enter (protArgs=0x1085a964, memRecs=0x84b9a8, constructHandleArgs=0x85adf8)[TMS320C66x_0] [t=0x00bb1967] ti.sdo.fc.ires.edma3chan: [+2] IRES_EDMA3CHAN_constructHandle> Address of handle 0x85aea0, paRamIndices 0x85aee0, paRamAddresses 0x85aed4, shadowParams 0x0, tccIndices 0x85aee6, edmaChannel 2[TMS320C66x_0] [t=0x00bbef2b] ti.sdo.fc.ires.edma3chan: [+2] IRES_EDMA3CHAN_constructHandle> Num params 3, Num Tccs 1, Qdma channel 518 Edma channel 2[TMS320C66x_0] [t=0x00bc7c85] ti.sdo.fc.ires.edma3chan: [+2] IRES_EDMA3CHAN_constructHandle> ESR 0x0: 0x4 IPR 0x0: 0x4 [TMS320C66x_0] [t=0x00bcec95] ti.sdo.fc.ires.edma3chan: [+X] IRES_EDMA3CHAN_constructHandle> Exit (status=0, handle=0x85aea0)[TMS320C66x_0] [t=0x00bd63d8] ti.sdo.fc.dskt2: [+E] DSKT2_freePersistent> Enter (numRecs=1)[TMS320C66x_0] [t=0x00bdb793] ti.sdo.fc.dskt2: [+E] _DSKT2_freeAllocatedMemory> Enter (scratchMutexId=-1, number=1, extHeap=0x858e10)[TMS320C66x_0] [t=0x00be34a8] ti.sdo.fc.dskt2: [+E] _DSKT2_isSharedScratchAddr> Enter (scratchMutexId=-1, addr=0x85adf8)[TMS320C66x_0] [t=0x00bea4ac] ti.sdo.fc.dskt2: [+X] _DSKT2_isSharedScratchAddr> Exit (status=FALSE)[TMS320C66x_0] [t=0x00bf01ad] ti.sdo.fc.dskt2: [+X] _DSKT2_freeAllocatedMemory> Exit (returnVal=1)[TMS320C66x_0] [t=0x00bf5b63] ti.sdo.fc.dskt2: [+X] DSKT2_freePersistent> Exit[TMS320C66x_0] [t=0x00bfa1d3] ti.sdo.fc.ires.edma3chan: [+X] IRESMAN_EDMA3CHAN_getHandles> Exit (handle=0x85aea0, status=IRES_OK)[TMS320C66x_0] [t=0x00c01dab] ti.sdo.fc.ires.edma3chan: [+E] IRESMAN_EDMA3CHAN_getProtocolName> Enter[TMS320C66x_0] [t=0x00c079a4] ti.sdo.fc.ires.edma3chan: [+X] IRESMAN_EDMA3CHAN_getProtocolName> Exit (name=ti.sdo.fc.ires.edma3chan)[TMS320C66x_0] [t=0x00c0f39a] ti.sdo.fc.ires.edma3chan: [+E] IRESMAN_EDMA3CHAN_getProtocolRevision> Enter[TMS320C66x_0] [t=0x00c15331] ti.sdo.fc.ires.edma3chan: [+X] IRESMAN_EDMA3CHAN_getProtocolRevision> Exit (version=(2.0.0))[TMS320C66x_0] [t=0x00c1c627] ti.sdo.fc.rman: [+2] RMAN_assignResources> Call getHandle on the IRESMAN implementation 0x858f18[TMS320C66x_0] [t=0x00c23e86] ti.sdo.fc.ires.edma3chan: [+E] IRESMAN_EDMA3CHAN_getHandles> Enter (protocolArgs=0x1085a97c, scratchGroupId=-1)[TMS320C66x_0] [t=0x00c2c35a] ti.sdo.fc.edma3: [+E] EDMA3_getResourceManager> Enter (alg=0x1085a918, scratchGroupId =-1)[TMS320C66x_0] [t=0x00c333f4] ti.sdo.fc.edma3: [+2] EDMA3_getResourceManager> Return system Resource Manager handle[TMS320C66x_0] [t=0x00c39c91] ti.sdo.fc.edma3: [+X] EDMA3_getResourceManager> Exit (handle=0x83d170)[TMS320C66x_0] [t=0x00c3fa2e] ti.sdo.fc.ires.edma3chan: [+2] IRESMAN_EDMA3CHAN_getHandles> DCHMAP exists on device [TMS320C66x_0] [t=0x00c46428] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> Contiguous PaRams requested[TMS320C66x_0] [t=0x00c508a6] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> Obtained 23 PaRams starting at 73 [TMS320C66x_0] [t=0x00c581c8] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> Obtained TCC 3[TMS320C66x_0] [t=0x00c5e273] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> DCHMAP exists on device[TMS320C66x_0] [t=0x00c64a58] ti.sdo.fc.ires.edma3chan: [+2] IRESMAN_EDMA3CHAN_getHandles> EDMA Channel ANY requested with 1 TCC ANY.[TMS320C66x_0] [t=0x00c6c7b7] ti.sdo.fc.ires.edma3chan: [+4] IRESMAN_EDMA3CHAN_getHandles> Obtained Edma channel 3[TMS320C66x_0] [t=0x00c73097] ti.sdo.fc.dskt2: [+E] DSKT2_allocPersistent> Enter (numRecs=1)[TMS320C66x_0] [t=0x00c784d1] ti.sdo.fc.dskt2: [+E] _DSKT2_init> Enter[TMS320C66x_0] [t=0x00c7c353] ti.sdo.fc.dskt2: [+X] _DSKT2_init> Exit[TMS320C66x_0] [t=0x00c8019d] ti.sdo.fc.dskt2: [+E] _DSKT2_assignInstanceMemory> Enter (scratchId=-1, numRecs=1, extHeap=0x858e10)[TMS320C66x_0] [t=0x00c87c72] ti.sdo.fc.dskt2: [+E] _DSKT2_allocateInDesignatedSpace> Enter (index=0, ialgSpace=IALG_EXTERNAL, extHeap=0x858e10)[TMS320C66x_0] [t=0x00c90935] ti.sdo.fc.dskt2: [+X] _DSKT2_allocateInDesignatedSpace> Exit (returnVal=1)[TMS320C66x_0] [t=0x00c96932] ti.sdo.fc.dskt2: [+2] _DSKT2_assignInstanceMemory> memTab[0] allocated in persistent memory in Memory space:IALG_EXTERNAL. Addr=0x85adf8[TMS320C66x_0] [t=0x00ca04b7] ti.sdo.fc.dskt2: [+X] _DSKT2_assignInstanceMemory> Exit (returnVal=1)[TMS320C66x_0] [t=0x00ca5f3e] ti.sdo.fc.dskt2: [+X] DSKT2_allocPersistent> Exit (status=1)[TMS320C66x_0] [t=0x00cab2b9] ti.sdo.fc.ires.edma3chan: [+E] IRES_EDMA3CHAN_getNumMemRecs> Enter (protArgs=0x1085a97c)[TMS320C66x_0] [t=0x00cb20c0] ti.sdo.fc.ires.edma3chan: [+X] IRES_EDMA3CHAN_getNumMemRecs> Exit (Num=1)[TMS320C66x_0] [t=0x00cb7ef2] ti.sdo.fc.ires.edma3chan: [+E] IRES_EDMA3CHAN_getMemRecs> Enter (handle=0x0, resProtocolArgs=0x1085a97c, memRecs=0x84b9a8)[TMS320C66x_0] [t=0x00cc11f1] ti.sdo.fc.ires.edma3chan: [+4] IRES_EDMA3CHAN_getMemRecs> Amount of memory requested 0xc0, alignment 0x4, space IALG_EXTERNAL attrs IALG_PERSIST[TMS320C66x_0] [t=0x00ccb38e] ti.sdo.fc.ires.edma3chan: [+X] IRES_EDMA3CHAN_getMemRecs> Exit (status=IRES_EOK)[TMS320C66x_0] [t=0x00cd17ac] ti.sdo.fc.dskt2: [+E] DSKT2_allocPersistent> Enter (numRecs=1)[TMS320C66x_0] [t=0x00cd6bd7] ti.sdo.fc.dskt2: [+E] _DSKT2_init> Enter[TMS320C66x_0] [t=0x00cdaa57] ti.sdo.fc.dskt2: [+X] _DSKT2_init> Exit[TMS320C66x_0] [t=0x00cde88b] ti.sdo.fc.dskt2: [+E] _DSKT2_assignInstanceMemory> Enter (scratchId=-1, numRecs=1, extHeap=0x858e10)[TMS320C66x_0] [t=0x00ce6354] ti.sdo.fc.dskt2: [+E] _DSKT2_allocateInDesignatedSpace> Enter (index=0, ialgSpace=IALG_EXTERNAL, extHeap=0x858e10)[TMS320C66x_0] [t=0x00ceefb9] ti.sdo.fc.dskt2: [+X] _DSKT2_allocateInDesignatedSpace> Exit (returnVal=1)[TMS320C66x_0] [t=0x00cf4fb6] ti.sdo.fc.dskt2: [+2] _DSKT2_assignInstanceMemory> memTab[0] allocated in persistent memory in Memory space:IALG_EXTERNAL. Addr=0x85aee8[TMS320C66x_0] [t=0x00cfeb3b] ti.sdo.fc.dskt2: [+X] _DSKT2_assignInstanceMemory> Exit (returnVal=1)[TMS320C66x_0] [t=0x00d045c2] ti.sdo.fc.dskt2: [+X] DSKT2_allocPersistent> Exit (status=1)[TMS320C66x_0] [t=0x00d0991c] ti.sdo.fc.ires.edma3chan: [+E] IRES_EDMA3CHAN_constructHandle> Enter (protArgs=0x1085a97c, memRecs=0x84b9a8, constructHandleArgs=0x85adf8)[TMS320C66x_0] [t=0x00d13a9e] ti.sdo.fc.ires.edma3chan: [+2] IRES_EDMA3CHAN_constructHandle> Address of handle 0x85aee8, paRamIndices 0x85af78, paRamAddresses 0x85af1c, shadowParams 0x0, tccIndices 0x85afa6, edmaChannel 3[TMS320C66x_0] [t=0x00d214ca] ti.sdo.fc.ires.edma3chan: [+2] IRES_EDMA3CHAN_constructHandle> Num params 23, Num Tccs 1, Qdma channel 518 Edma channel 3[TMS320C66x_0] [t=0x00d2a33f] ti.sdo.fc.ires.edma3chan: [+2] IRES_EDMA3CHAN_constructHandle> ESR 0x0: 0x8 IPR 0x0: 0x8 [TMS320C66x_0] [t=0x00d3134f] ti.sdo.fc.ires.edma3chan: [+X] IRES_EDMA3CHAN_constructHandle> Exit (status=0, handle=0x85aee8)[TMS320C66x_0] [t=0x00d3889d] ti.sdo.fc.dskt2: [+E] DSKT2_freePersistent> Enter (numRecs=1)[TMS320C66x_0] [t=0x00d3dc57] ti.sdo.fc.dskt2: [+E] _DSKT2_freeAllocatedMemory> Enter (scratchMutexId=-1, number=1, extHeap=0x858e10)[TMS320C66x_0] [t=0x00d4596c] ti.sdo.fc.dskt2: [+E] _DSKT2_isSharedScratchAddr> Enter (scratchMutexId=-1, addr=0x85adf8)[TMS320C66x_0] [t=0x00d4c970] ti.sdo.fc.dskt2: [+X] _DSKT2_isSharedScratchAddr> Exit (status=FALSE)[TMS320C66x_0] [t=0x00d52671] ti.sdo.fc.dskt2: [+X] _DSKT2_freeAllocatedMemory> Exit (returnVal=1)[TMS320C66x_0] [t=0x00d58027] ti.sdo.fc.dskt2: [+X] DSKT2_freePersistent> Exit[TMS320C66x_0] [t=0x00d5c697] ti.sdo.fc.ires.edma3chan: [+X] IRESMAN_EDMA3CHAN_getHandles> Exit (handle=0x85aee8, status=IRES_OK)[TMS320C66x_0] [t=0x00d643ba] ti.sdo.fc.dskt2: [+E] DSKT2_freePersistent> Enter (numRecs=1)[TMS320C66x_0] [t=0x00d697a2] ti.sdo.fc.dskt2: [+E] _DSKT2_freeAllocatedMemory> Enter (scratchMutexId=-1, number=1, extHeap=0x858e10)[TMS320C66x_0] [t=0x00d7149f] ti.sdo.fc.dskt2: [+E] _DSKT2_isSharedScratchAddr> Enter (scratchMutexId=-1, addr=0x85adb8)[TMS320C66x_0] [t=0x00d78493] ti.sdo.fc.dskt2: [+X] _DSKT2_isSharedScratchAddr> Exit (status=FALSE)[TMS320C66x_0] [t=0x00d7e13e] ti.sdo.fc.dskt2: [+X] _DSKT2_freeAllocatedMemory> Exit (returnVal=1)[TMS320C66x_0] [t=0x00d83aea] ti.sdo.fc.dskt2: [+X] DSKT2_freePersistent> Exit[TMS320C66x_0] [t=0x00d8810d] ti.sdo.fc.rman: [+X] RMAN_assignResources> Exit (status=0)

Hi Hongmei,

Oleg is on vacation and now I'm in charge of this task.

The function that have all the RMAN calls is attached and the fuction name is:

VideoCodec_TI_H264_BP_Encoder_InitEncoder 

1018.video_codec_TI_H264_BP_enc.c

I'm sending the app.cfg atthached too.0247.app.cfg

If you find something wrong I will be glad to get your response as soon.

Thanks,

Enrique

Hi Enrique,

Thanks for the files. The .cfg looks fine. One change you can make is to set "META.maxPaRams[0] = 42;", which matches the number of PaRAM sets in your surf_edma_C6678_config. Since H264BP encoder uses only 32 PaRAM sets per core, your original line of "META.maxPaRams[0] = 32;" should be fine too.

In your c file with RMAN calls, can you please move "p_obj->handle->fxns->algDeactivate(p_obj->handle);" after calling RMAN_activateAllResources(), and also add CacheWbInv after algDeactivate? In algDeactivate, internal codec buffers (including EDMA related buffers) will be copied from local L2 to DDR. These buffers will be copied back from DDR to local L2 when doing algActivate. So, RMAN_assignResources() and RMAN_activateAllResources() needs to be called with algActivate and algDeactivate around. 

p_obj->handle->fxns->algActivate(p_obj->handle); 

video_crash_debug(0x1080);

...

ires_status = RMAN_assignResources(p_obj->handle, resFxns, 0);
if (ires_status != IRES_OK)
{
  SMPDetect_Printf(VSMPD_CODEC,("ERROR: RMAN_assignResources: Assign Resource Failed [%d]\n", ires_status));
  SMPDetect_Printf(VSMPD_ERROR,("ERROR: RMAN_assignResources: Assign Resource Failed [%d]\n", ires_status));
  return (-1);
}
/* Activate All Resources*/
ires_status = RMAN_activateAllResources(p_obj->handle, resFxns, 0);

p_obj->handle->fxns->algDeactivate(p_obj->handle);

Cache_wbInvAll();

Please let us know if this resolves the issue. If not, please also provide your file calling RMAN_Init().

Thanks,

Hongmei

Hongmei,

Thanks for your answer, I added your suggestions but  it doesn't work yet. The same failure is happens.

I attached the file (surf_main.c) where RMAN_init is called (line726)

and the surf_edma_C6678_config array is defined in edma_config.c

0334.surf_main.c

2465.edma_config.c

Thanks,

Enrique.

Hongmei,

Something else, I run the TI example TestAppEncoder, and it fails in the same place (in RMAN_assignResources call)  as my code.

Something in the environment could cause this failure?

Thanks,

Enrique

Hi Enrique,

Thanks for the files. RMAN_Init() call looks fine too.

One question: which H264BP encoder lib are you using when you try TestAppEncoder and your application? Is it the one published on Web or the updated lib attached in this query earlier? Please also provide the list of tools you used for TestAppEncoder and your application.

Regards,

Hongmei

Hi Hongmei,

I tried the TestAppEncoder with boths H264BP encoders. With the one updated in this query earlier, the app fails.

But with the H264P encoder download from the web, the Test AppEncoder runs properly.

Now, when I use the H264BP encoder download from the web that runs properly in the TestAppEncoder in my App, the code composer crashes immediately after download t he out file to the core.

The tools of TestAppEncoder:

Compiler 7.4.1

-XDCTools 3.20.8.88

-FC 3.20.2.29

-SYS/BIOS 6.31.0.18

-H.264 BP encoder ver 01.24.00.01

The Tools of my App:

Compiler 7.4.1

-XDCTools 3.23.2.47

-FC 3.22.3.09

-MCSDK 1.1.1.4

-SYS/BIOS 6.33.4.39

-H.264 BP encoder ver 01.24.00.01

Now, I'm trying to compile my App with the same tools that the TestAppEncoder runs, but I have compilation problems.

Thanks,

Enrique

Hi Enrique,

The H264BP encoder lib attached earlier in this post is built with the following tools. When using this lib in unit test, please update the unit test project to use the same set of tools. Just updating CGT will not work.

Code generation tools version 7.4.0

SYS/BIOS version 6.33.04.39,
Bios IPC version 1.24.02.27,
XDC Tools version 3.23.02.47,
XDAIS Tools version 7.22.00.03,
EDMA3 LLD version 02.11.05.02 &
Framework Component (FC) version 3.22.03.09

With the tools in your App, it should be fine to use the encoder lib attached in this post. 

BTW, C6678 Video codecs (including H264BP encoder) will be published on Web by next week. I will let you know once that is done.

Thanks,

Hongmei

Hongmei,

OK, we are waiting to try with the H264BP new version lib.

Thanks,

Enrique

Hi,

Do you have any information about release date of new version of C6678 codecs?

Was it delayed?

We are stuck with this integration very long time and I hope that this release will help us to finish it.

Thanks,

Oleg

Hi Oleg,

C6678 codecs will be published on Web this week due to some release related issues. I am sorry for the delay. For now, can you please use the installers attached below?

6765.H264BPENC.zip

As for the integration issue in your application, I am suspecting it is due to tool incompatibility and/or some other issues in the application. The codec lib posted earlier in this query should be fine to use. It has been used by another E2E user for integration: http://e2e.ti.com/support/embedded/multimedia_software_codecs/f/356/p/240716/842560.aspx#842560

Also wonder if you can use H264HP encoder rather than H264BP encoder. H264HP encoder built on new CGTOOL has been published on Web: http://software-dl.ti.com/dsps/dsps_public_sw/codecs/C6678/H264HP_E/01_00_00/index_FDS.html. An updated version of the installers with a few fixes can be found from http://e2e.ti.com/support/embedded/multimedia_software_codecs/f/356/t/240820.aspx. We will also be obsoleting the H264BP encoder since H264HP encoder is in place.

Thanks,

Hongmei

Hi Oleg,

Please find the latest C6678 codecs from http://software-dl.ti.com/dsps/dsps_public_sw/codecs/C6678/index.html.

Thanks,

Hongmei

Hi,
I finally succeeded to make the encoder work!

One problem was that RMAN_assignResources didn't work with scratch group id != -1

Another problem was somewhere in the codec configuration that I still didn't find, just used the configuration from the sample applicaction and it helped.
Thanks to your help.

I have one more, I hope last, question
Both my code and ti sample application work only if I set scratch group id = -1 in RMAN_assignResources, 
which means allocate persistent resources.
If I give scratch group id = 0, RMAN_assignResources fails with no resource error.

The problem that I want to use many instances of encoders and decoders and I already get an error when I try to
allocate only 1 encoder and 1 decoder.

How can I allocate scratch edma resources and not persistent?
And in general, what are the edma resource requirement of each encoder instance?

Thanks,
Oleg

Hi Oleg,

It's great that your have accomplished the encoder integration. We are glad that we can help.

Using scratch groups to implement multiple codec instances is absolutely possible. This is already used in MCSDK Video (http://www.ti.com/tool/demovideo-multicore), and please find the reference code from "dsp\siu\osal\bios6\siuFcBios6.c". The corresponding .cfg is located at dsp\ggcfg\build\hdg\sv04\bios\bios6.cfg.

Each H264 BP encoder requires the same amount of EDMA resource: 33 PaRAM sets and 8 EDMA channels. 

Thanks,

Hongmei

Hi,

I used the sample that you gave me, but I didn't understand something (this scenario is not covered in the example):

if I use scratch edma resources, should I use RMAN_activateAllResources() and RMAN_deactivateAllResources() function calls?

As I understand it should be called every time before and after the execution of every algorithm that uses these scratch edma resources.

But when I tried to use it, it always failed, I tried to use it with different combinations with IALG algActivate and algDeactivate functions.

What should be the correct call sequence (algActivate, algDeactivate, RMAN_activateAllResources and  RMAN_deactivateAllResources)?

The strange fact that when I remove these calls everything works and 2 different algorithms (h.264 decoder and h.264 encoder) shared these edma resources just fine.

Another question is related to RMAN_freeAllResources call. It works properly only if I call algActivate() before and algDeactivate after this call. Is this flow correct?

And the last one: should I protect RMAN module calls with hardware semaphore if I use it on all cores? On each core there is only one task running and no multi-threading is used.

Thanks,

Oleg

Oleg,

My replies below:-

Oleg Fomenko said:

Hi,

I used the sample that you gave me, but I didn't understand something (this scenario is not covered in the example):

if I use scratch edma resources, should I use RMAN_activateAllResources() and RMAN_deactivateAllResources() function calls?

[Gdang] Yes you do need to call this APIs. These call the algorithms IRES_Fxns:activateAllResources/deactivateAllResources that may perform some bookkeeping to save/restore scratch related state of IRES resources.

As I understand it should be called every time before and after the execution of every algorithm that uses these scratch edma resources.

[Gdang] Yes, that's right

But when I tried to use it, it always failed, I tried to use it with different combinations with IALG algActivate and algDeactivate functions.

What should be the correct call sequence (algActivate, algDeactivate, RMAN_activateAllResources and  RMAN_deactivateAllResources)?

[Gdang] Are you using DSKT2 to grant memory to your algorithms ? If you are, your order would be the following:-

DSKT2_activateAlg

RMAN_activateAllResources

<process>

RMAN_deactivateAllResources

DSKT2_deactivateAlg

[Gdang] If you arent using DSKT2, you'd replace DSKT2_activate/deactivateAlg with IALG_Fxns:activateAlg/deactivateAlg. But that implies that your 'own' framework is somehow managing scratch memory as well (that otherwise DSKT2 would be managing ?)

The strange fact that when I remove these calls everything works and 2 different algorithms (h.264 decoder and h.264 encoder) shared these edma resources just fine.

Another question is related to RMAN_freeAllResources call. It works properly only if I call algActivate() before and algDeactivate after this call. Is this flow correct?

[Gdang] No, that doesn't sound right. RMAN_freeResources is used to free the resources back to the system, you would want to save context or algDeactivate, before you let go. You don't mention exactly what 'fails'. I'd like you to enable some FC trace and share that with us. Look at hte following FC example to get an idea of the right order to call these APIs:- ti/sdo/fc/rman/examples/dmaXferScratch/app.c function rmanTask

And the last one: should I protect RMAN module calls with hardware semaphore if I use it on all cores? On each core there is only one task running and no multi-threading is used.

[Gdang] If you are using the same partitioning of resources/configuration that Hongmei has advised, then each core has its own set of resources that it plays with and hence no coordination among cores should be necessary.

Thanks,

Oleg

Thanks,

Gunjan.

Hi,
I switched on FC traces and its result is attached:
in this scenario there is both h.264 decoder and h.264 encoder are used:
-first the decoder is initialized, then the encoder is initialized.
-When the decoder is executed for the first time, it calls RMAN_activateAllResources() and succeeds.
Later, after the processing of the current packet is done it calls RMAN_deactivateAllResources() and fails.
Of course, all next tries to call RMAN_activateAllResources() to decode other packets fails also.
-I use the correct call sequence as you described in your previous post.
-I don't use DSKT2 for allocating memory for h.264 decoder and encoder, I have this handling in my framework, but DSKT2 is used a lot by RMAN as i can see in the traces
-Additional problem is happening when trying to call RMAN_freeResources() (without calling algActivate() before, with algActivate() it works just fine): the DSP halts after unrecoverable error. (see the attached trace)
my .cfg is also attached.
Do you know what I'm doing wrong?
Thanks for your help,
Oleg

7462.fc_traces_log.txt0474.app.cfg