I have created the following SPI Boot Parameter Table per the documentation found within SPRUGY5B.pdf for use on the CC657 EVM.
The following table contains the data making up of the two portions, "common" per Table 2-6 and "specific" per Table 3-27 within the KeyStone Architecture Bootloader User Guide (SPRUGY5B.pdf). The "common" portion is the first 12 bytes and the SPI "specific" portion is contatined within bytes 12-35.
| Byte Offset | Value | Name | Description |
| 0 | 0x0024 | Length | The length of the parameter table (including "this" length field) in bytes. |
| 2 | 0x0000 | Checksum | The 16-bit ones comp. of the ones comp. of table. (0 = disabled) |
| 4 | 0x0006 | Boot Mode | 0-7 per Table 2-5, here a value of 6 specifies SPI boot device |
| 6 | 0x0000 | Port Num | Identifies the device port number to boot from, here 0 |
| 8 | 0x4020 | SW PLL, MSW | PLL Config MSW, bits 31-16, here PLL Config Ctl = 01, PLL Mult = 32 |
| 10 | 0x0002 | SW PLL, LSW | PLL Config LSW, bits 15-0, here PLL Pre-Div = 0, PLL Post-Div = 2 |
| 12 | 0x0001 | Options | Bits 0 & 1 Modes, here 01 = Load boot records from the SPI (boot tables) |
| 14 | 0x0000 | Mode | SPI mode, 0-3, here 0 = Data is output on rising edge of SPICLK, Input data latched on falling edge |
| 16 | 0x0003 | Address Width | The number of bytes in the SPI device address (2 or 3 for 16 or 24 bits), here = 3 for 24 bits |
| 18 | 0x0010 | Data Width | The data width of the device (8 or 16), here = 16 bits |
| 20 | 0x0004 | NPin | The operational mode, 3 or 4 pin, here = 4, *** also tried 0 for 4-pin mode per Table 3-29 *** |
| 22 | 0x0000 | Chipsel | The chip select used (valid in 4 pin mode only. Can by 0-3, here = 0. |
| 24 | 0x0000 | Read Addr MSW | The first address to read from, MSW (valid for 24 bit address width only), here = 0 |
| 26 | 0x0024 | Read Addr LSW | The first address to read from, LSW, here = 36 to begin reading immediately following this table |
| 28 | 0x03e8 | CPU Freq MHz | The speed of the CPU, in MHz, here = 1000 |
| 30 | 0x0005 | Bus Freq, MHz | The MHz portion of the SPI bus frequency (Default = 5 MHz), here = 5 |
| 32 | 0x0000 | Bus Freq, KHz | The KHz portion of the SPI bus frequency (Default = 0), here = 5 |
| 34 | 0x0000 | PADDING | PADDING for 32-bit alignment |
I have programmed the SPI Parameter Table above as series of bytes (9 32-bit words) into the C6657 EVM's NOR flash at sector 0 using "norwriter" successfully with jumpers set to no-boot, i.e. SW3 = 1000 0000, and SW5 = 0000 0000. Here's path C:\ti\mcsdk_2_01_00_03\tools\writer\nor\evmc6657l\bin\norwriter_evm6657l.out
Here's the above SPI Parameter Table as a sequential series of 9 32-bit words.
0x00240000 0x00060000 0x40200002 0x00010000 0x00030010 0x00040000 0x00000024 0x03e80005 0x00000000
After configuring the C6657 EVM to SPI-Boot, i.e. SW3 = 1011 0000, and SW5 = 0010 0000, and booting the EVM I do witness it perform SPI reads of the specified 36 bytes, but the C6657's RBL does NOT issue any subsequent SPI reads from the specified Read Address of 0x00000024 provided within the SPI Boot Parameter Table above.
For completeness the following Boot Table has also been programmed into the NOR Flash immediately following the SPI Boot Parameter Table above. This is the "simple" application provided by TI.
0x00810000 0x00000040 0x00810000 0x0099a228 0x00889168 0x010100a8 0x014000e8 0x01080226 0x01810828 0x01c000e8 0x018c3626 0x020c0226 0x0001a120 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000004 0x00810100 0x1234abcd 0x00000001 0x00810201 0x12000000 0x00000002 0x00810210 0x12340000 0x00000000
Again, I see the SPI Parameter Table being read, but no SPI reads are being requested to load the Boot Table. Why?
I would appreciate any help to explain what is wrong within the SPI Parameter Table preventing the RBL from proceeding to load the Boot Table via SPI.
Is the KeyStone Architecture Bootloader User Guide (SPRUGY5B) correct? If so, what is wrong? If not, please advise updated documentation for the correct procedure to perform a direct SPI Boot from NOR Flash.
Thanks,
-George
