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Currently I'm working on a custom board with a TI Sitara AM3359, two DP83848I PHYs and some other devices. These two PHYs are connected via RMII. We use an external oscillator for the reference clock of the PHYs because of Advisory 1.0.16 in the AM335x errata sheet.
Now the problem is that the first PHY is found on Linux (using TI SDK 05.05.01), but it is impossible to get an ethernet connection. We assume the reason is an interference at the reference clock to the PHY.
As long as the Linux kernel isn't running, we can measure a clean 50 MHz frequency at the PHY reference clock input. But when the kernel starts, we see an interference. We guess this comes from the rmii1_refclk pin from the AM3359. It outputs a 52 MHz frequency even this pin is defined as input in the board file (this 52 MHz frequency is also there if this pin isn't configured at all). We suppose the AM3359 has to be telled that it shouldn't output this reference clock. The gmii_sel register, bit 6 and 7 seems to be the candidates for doing this.
Could this be right? What else could cause this behaviour?
I'm searching for the right way to write to the gmii_sel register. What might be the right place to do so? Perhaps in the MAC driver in the Linux kernel?
FTR: In my board file in function am335x_evm_init(), changing am33xx_cpsw_init_generic(RMII_MODE_ENABLE,gigabit_enable);to am33xx_cpsw_init_generic((RMII_MODE_ENABLE|(1 << 6)|(1 << 7)),gigabit_enable); does the trick.
How can I check if the correct PHY driver is loaded? I get the suspicion that it isn't, because the LEDs also aren't working.
Problem solved, it was a combined hardware and software problem. The PHYs got the ETH_RESET signal all the time. From the software side, using am33xx_cpsw_init() with the exact PHY addresses instead of am33xx_cpsw_init_generic() in am335x_evm_init() did the trick.