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AM3359 RGMII with PHY RTL8211CL problem

hw chen
Prodigy 40 points
Other Parts Discussed in Thread: AM3359

I design a board with AM3359 process, and designed two ethernet port with RGMII interface to PHY RTL8211CL. and delay by RTL8211CL, the AM3359 initialize as follow:

1. Control Module RGMII_SELECT for 0x3A select the RGMII without internal delay

2.init rgmii1_pin_mux and rgmii2_pin_mux

3.MDIOInit

4.enable GPMACS clocks

5.init the ALE port and sliver etc

and the problem is:

The RGMII 's TCLK 25M clock is ok (Test by TDS2012 oscilloscope )

but when I send DHCP request the TXD0,1,2,3 always stay low, but the CPDMA_DESC_OWNER bit have cleared and tx_chan.hdp have cleared

The software refer from the AM335X_StarterWare_02_00_00_07

 

  • 0
    TI__Mastermind 27890 points

    HW,

    Have you verified that you can communicate with the PHYs via MDIO?

  • 0 in reply to -DK-
    Prodigy 40 points

    Yes, I can read the PHY ID from the RTL8211CL via MDIO

    I connect the ethernet port to my PC, the PC network port display connecting ... and disconnected ...connectting ... disconnect ... always.

  • 0 in reply to hw chen
    TI__Mastermind 27890 points

    Did you perform a timing analysis of the RGMII interface prior to layout? Do you have this data?

    Did you make any SW changes to support this RealTek PHY? This is the first time I have seen it used with AM335x.

    Please verify you are connected to a 10/100 port (not GigE), dump the contents of the AM335x MACCONTROL register, and post the result here.

  • 0 in reply to -DK-
    Prodigy 40 points

    I dump the MACCONTROL

    1, 0x18021 ,have 25Mhz TX-CLK out, but TX Data  pin 1,2,3,4 no output waves,alway stay low,

    2, 0x8021,have same as 0x18021


     

  • 0 in reply to hw chen
    Prodigy 40 points

    IS AM335x RGMII support 100Mbs?

    Have a better suggestion?