Hi,
I'm a little bit confused about the watchdog mode of the Timers in the C6678.I have read the SPRS691c and the SPRUGV5a and so far it seems all clear.
But then I found the example in .\pdk_C6678_1_1_2_5\packages\ti\csl\example\timer\timer_test.c and this was confusing.
The SPRUGV5 on page 34 (figure 4-2) is clear about the Watchdog timeout state: "After entering the timeout state, the
watchdog timer cannot be enabled again until a hardware reset occurs"
But the example code in timer_test.c gets the Timeout Interrupt(CSL_GEM_TINTLN) several times ( exactly 5 times) and it does not seem that the WD is disabled.
Do I get something wrong? Has anyone an idea where my fault is?
Thanks