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Watchdog Timer on C6678

Hi,

I'm a little bit confused about the watchdog mode of the Timers in the C6678.I have read the SPRS691c and the SPRUGV5a and so far it seems all clear.

But then I found the example in .\pdk_C6678_1_1_2_5\packages\ti\csl\example\timer\timer_test.c and this was confusing.

The SPRUGV5 on page 34 (figure 4-2) is clear about the Watchdog timeout state: "After entering the timeout state, the
watchdog timer cannot be enabled again until a hardware reset occurs"

But the example code in timer_test.c gets the Timeout Interrupt(CSL_GEM_TINTLN) several times ( exactly 5 times) and it does not seem that the WD is disabled.

Do I get something wrong? Has anyone an idea where my fault is?

Thanks

  • There are Six Different Timer Tests that are run through in the code.  Only the last one is a Watchdog timer.  I'd expect the timer interrupts to fire exactly five times.

    Best Regards,

    Chad

  • Hi Chad, thanks for the quick reply

    I know that there are 6 different timer tests, but I'm only concerned about the watchdog mode. It is right that the timer interrupt fire 5 times.

    But my problem is: The SPRUGV5 on page 34 (figure 4-2) is clear about the Watchdog timeout state: "After entering the timeout state, the
    watchdog timer cannot be enabled again until a hardware reset occurs"

    So why does the timer interrupts fire five times???? I expected the watchdog timer to stay in the timeout state, as the user guide says "the
    watchdog timer cannot be enabled again until a hardware reset occurs"

    Can you please explain this to me.

    Regards Fabian

  • During the first 5 timer tests, the timer is not setup as a watchdog timer.  So when the timer completion occurs, it's not in a watchdog timer timeout state.  It's only on the sixth test that the timer is configured to be in the watchdog timer mode.  That is why it is the last one to execute.

    Best Regards,
    Chad

  • Sorry, that I have to disagree with you, but would you please take a look at the code for the test_wd_timer() function.

    It says:

        /* Configure the timer. */
        CSL_tmrHwSetup(wdTmr, &hwSetup);

        /* Reset the timer ISR counter. */
        timerISRCounter = 0;

        /* Reset the Timer */
        CSL_tmrHwControl(wdTmr, CSL_TMR_CMD_RESET64, NULL);

        /* Start the timer in CONTINUOUS Mode. */
        CSL_tmrHwControl(wdTmr, CSL_TMR_CMD_START_WDT, (void *)&TimeCountMode);
                                   
        /* Watchdog timer service key1 */
        loadVal = CSL_TMR_WDTCR_WDKEY_CMD1;
        CSL_tmrHwControl(wdTmr, CSL_TMR_CMD_LOAD_WDKEY, (Uint16 *)&loadVal);
     
        /* Watchdog timer service key2 */
        loadVal = CSL_TMR_WDTCR_WDKEY_CMD2;
        CSL_tmrHwControl(wdTmr, CSL_TMR_CMD_LOAD_WDKEY, (Uint16 *)&loadVal);

        /* Wait for the timer interrupts to fire; since the watchdog timers run continuously
         * we wait for at least 5 interrupts to fire... */
        while (timerISRCounter != 5);

    So it clearly says the timer ISR counter is set to "0". And then the function waits for the interrupt to fire 5 times. But first the WD is enabled and then the program waits for 5 interrupts.

    The Watchdog test starts with the ISR counter is reset, no matter which other tests have run before.

    So please tell me how this is possible. Or why is the watchdog expected to recover from timeout state?

    Regards Fabian

  • Ok I found the answer myself. Sry Chad but I think you got the source code of the timer example wrong at this point.

    The watchdog timer works correctly and fires indeed only one time. But the source code of the TI example is wrong, because the example expect the WD interrupt to fire 5 times (as I explained before). So the example will never finish, because the DSP stucks at:

        /* Wait for the timer interrupts to fire; since the watchdog timers run continuously
         * we wait for at least 5 interrupts to fire... */
        while (timerISRCounter != 5);

    But timerISRCounter will never reach 5 because the WD only triggers the ISR one time. You can fix this by changing the while-statement to:

        /* Wait for the timer interrupts to fire; since the watchdog timers run continuously
         * we wait for at least 1 interrupts to fire... */
        while (timerISRCounter != 1);

    @TI: Please fix the bug in the timer example with the next version of your tools

    Thanks

    Regards Fabian