http://processors.wiki.ti.com/index.php/DM814x_AM387x_PSP_04.01.00.07_Release_Notes
States in the known issues…
“The internal 20MHz clock source for SATA PLL has some issues. This is being used as the default clock for SATA. Hence we were seeing interface fatal errors. This is a hardware issue. The workaround is to either use the 100MHz external clock from PCIe or find a 20mhz clock source on the board and feed into XI/CLKIN. The later option is transparent and does not require code change but the former requires code change and the PCIe PLL has to be programmed for this.”
The closest thing in the errata is Advisory 2.1.27 that says it only matters if we use VOUT0. Is there a problem with SATA and the 20MHz clock if we only use HDMI for output?