• State TI Thinks Resolved
  • Locked Locked
  • Replies 4 replies
  • Answers 1 answer
  • Subscribers 100 subscribers
  • Views 380 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

question about register PTR3 setting in DDR3 of 66AK2H12

GANG ZHANG48047
Intellectual 875 points

In GEL file xtcievmk2x.gel, for DDR3B, register PTR3 field tDINIT1(bit 28-20) is set to 0xD8, 0xB4, 0x90 and 0x6C for frequency 1600, 1333, 1066 and 800 respectively. However, I checked the datasheet of K4B4G1646B-HCK0 (4Gb), which is used in evm, the tRFC of it is 240, 200, 160, 120 frequency 1600, 1333, 1066 and 800 respectively. Under the definition of tDINIT1: max{tRFC+10ns, 5 tCK}, its value should be 0xFA, 0xD2, 0xAA, 0x82 respectively. Did the GEL file calculate this value wrong? 

  • 0
    TI__Mastermind 43660 points
    Hello Gang,

    I am not sure how they calculated tDINIT1 field value in GEL file. With reference to the datasheet values and user guide definition, the GEL values are not correct. However I will check on this and get back to you.

    Regards,
    Senthil
  • 0 in reply to Senthilkumar Srinivasan
    TI__Mastermind 46460 points

    Gang,

    I do not believe the GEL file is incorrect. The tDINIT1 field is calculated as the largest of either 5 DRAM clock periods or tRFC+10ns which is defined in the DRAM datasheet as tXS.  This time period is then converted to clock cycles by rounding up.  tRFC changes based on SDRAM density.

    Please see the attached spreadsheet tool that helps with the calculation of the register values.  It shows the proper calculation in cell C220 of the PHY Registers tab.  This spreadsheet will be released on TI.COM in the near future.

    4137.K2 DDR3 Register Calc v1p51.xlsx

    Tom

     

  • 0 in reply to Tom Johnson 16214
    Intellectual 875 points

    Tom, thanks for your reply. I checked the value under the Datasheet tab of 4137.K2 DDR3 Register Calc v1p51.xlsx, the value in column V, row 29 is 270, which is the value of tXS for K4B4G1646B(1600). The value of 180 in C220 in your previous reply is for MT41K256M16 15 (1333). Since the evm use K4B4G1646B-HCK0, the value should be 270.

  • 0 in reply to GANG ZHANG48047
    TI__Mastermind 46460 points

    Gang,

    I think your calculation is incorrect.  I have reworked all of the numbers and get the values shown in the GEL for tDINIT1.  It is the number of DDR clock periods in 270ns.  Please see the attached spreadsheet showing these calculations:

    tXS.xlsx

    Tom