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Hi,
I am having a very similar issue as seen in below thread.
e2e.ti.com/.../379997
I have a custom board based on the BeagleBoneBlack design. For the prototype boards, we have used the
exact same soc and DDR parts as the BBB.
On this board, trying to fine tune the DDR timing as explained in the wiki (processors.wiki.ti.com/.../Sitara_Linux_Training:_Tuning_the_DDR3_Timings_on_BeagleBoneBlack), we are getting 0x0 values for minimum, maximum, optimum and range columns..
We did try to invert the CLK_OUT from 0x1 to 0x0 in the gel file without changing any other values as an experiment suggested in the above thread, but still get the same results.
I have attached the following files
1. The CCS console error message (console_log.txt) []
2. The gel file we are using (BeagleBlack_400Mhz_4GbDDR.gel)
3. The xls file used to calculate parameters from board layout (RatioSeed_AM335x_boards.xls)
4. DDR3 board layout trace lengths (NETLEN_DDR3.txt)
By the way, we are using CCS v6.0.1.00040 and XDS100v2 JTAG.
With the register values from the BBB uboot, we were able to boot up UBoot.
But the Linux kernel does _not_ boot up. It fails randomly at different areas of the bootup sequence.
So I guess we really do need to find the fine tuned values to continue.
Thanks,
Warm Regards,
Harith
[CortxA8] Enter the PHY_INVERT_CLKOUT value (0 or 1) from the spreadsheet 1 Enter the Seed RD_DQS_SLAVE_RATIO Value in Hex to search the RD DQS Ratio Window 40 Enter the Seed FIFO_WE_SLAVE_RATIO Value in Hex to search the RD DQS Gate Window FE Enter the Seed WR_DQS_SLAVE_RATIO Write DQS Ratio Value in Hex to search the Write DQS Ratio Window 79 *************************************************************** The Slave Ratio Search Program Values are... *************************************************************** PARAMETER MAX | MIN | OPTIMUM | RANGE *************************************************************** DATA_PHY_RD_DQS_SLAVE_RATIO 0x000 | 0x000 | 0x000 | 0x000 DATA_PHY_FIFO_WE_SLAVE_RATIO 0x000 | 0x000 | 0x000 | 0x000 DATA_PHY_WR_DQS_SLAVE_RATIO 0x000 | 0x000 | 0x000 | 0x000 DATA_PHY_WR_DATA_SLAVE_RATIO 0x000 | 0x000 | 0x000 | 0x000 *************************************************************** rd_dqs_range = 0 fifo_we_range = 0 wr_dqs_range = 0 wr_data_range = 0 Optimal values have been found!! *************************************************************** The Slave Ratio Search Program Values are... *************************************************************** PARAMETER MAX | MIN | OPTIMUM | RANGE *************************************************************** DATA_PHY_RD_DQS_SLAVE_RATIO 0x000 | 0x000 | 0x000 | 0x000 DATA_PHY_FIFO_WE_SLAVE_RATIO 0x000 | 0x000 | 0x000 | 0x000 DATA_PHY_WR_DQS_SLAVE_RATIO 0x000 | 0x000 | 0x000 | 0x000 DATA_PHY_WR_DATA_SLAVE_RATIO 0x000 | 0x000 | 0x000 | 0x000 *************************************************************** ===== END OF TEST =====
NETNAME ROUTED LENGTH UNROUTED LENGTH VIAS CONNECTIONS PERCENTAGE ------------------------------------------------------------------------- DDR_A0 1228 m 0 m -579 1 0.05 TOP 45 m BOT 0 m IN1 0 m IN2 1183 m DDR_A1 1227 m 0 m -129 1 0.05 TOP 55 m BOT 0 m IN1 0 m IN2 1173 m DDR_A2 1232 m 0 m -132 1 0.05 TOP 49 m BOT 1183 m IN1 0 m IN2 0 m DDR_A3 1232 m 0 m -137 1 0.05 TOP 82 m BOT 0 m IN1 0 m IN2 1150 m DDR_A4 1239 m 0 m -105 1 0.05 TOP 46 m BOT 0 m IN1 1193 m IN2 0 m DDR_A5 1235 m 0 m -107 1 0.05 TOP 48 m BOT 0 m IN1 1188 m IN2 0 m DDR_A6 1230 m 0 m -112 1 0.05 TOP 45 m BOT 1185 m IN1 0 m IN2 0 m DDR_A7 1223 m 0 m -113 1 0.05 TOP 45 m BOT 0 m IN1 1178 m IN2 0 m DDR_A8 1231 m 0 m -114 1 0.05 TOP 52 m BOT 1179 m IN1 0 m IN2 0 m DDR_A9 1240 m 0 m -115 1 0.05 TOP 51 m BOT 0 m IN1 1190 m IN2 0 m DDR_A10 1238 m 0 m -118 1 0.05 TOP 44 m BOT 1194 m IN1 0 m IN2 0 m DDR_A11 1241 m 0 m -118 1 0.05 TOP 44 m BOT 0 m IN1 1197 m IN2 0 m DDR_A12 1241 m 0 m -118 1 0.05 TOP 44 m BOT 0 m IN1 0 m IN2 1197 m DDR_A13 1231 m 0 m -120 1 0.05 TOP 45 m BOT 1186 m IN1 0 m IN2 0 m DDR_A14 1222 m 0 m -122 1 0.05 TOP 48 m BOT 1173 m IN1 0 m IN2 0 m DDR_A15 1236 m 0 m -122 1 0.05 TOP 45 m BOT 0 m IN1 0 m IN2 1191 m DDR_BA0 1349 m 0 m -123 1 0.05 TOP 44 m BOT 0 m IN1 1305 m IN2 0 m DDR_BA1 710 m 0 m -126 1 0.05 TOP 124 m BOT 0 m IN1 0 m IN2 586 m DDR_BA2 1142 m 0 m -127 1 0.05 TOP 48 m BOT 0 m IN1 1094 m IN2 0 m DDR_CASN 553 m 0 m 0 1 0.05 TOP 553 m BOT 0 m IN1 0 m IN2 0 m DDR_CK 920 m 0 m 0 1 0.05 TOP 920 m BOT 0 m IN1 0 m IN2 0 m DDR_CKE 853 m 0 m -128 2 0.10 TOP 86 m BOT 30 m IN1 737 m IN2 0 m DDR_CKN 920 m 0 m 0 1 0.05 TOP 920 m BOT 0 m IN1 0 m IN2 0 m DDR_CSN0 445 m 0 m 0 1 0.05 TOP 445 m BOT 0 m IN1 0 m IN2 0 m DDR_D0 1250 m 0 m 0 1 0.05 TOP 1250 m BOT 0 m IN1 0 m IN2 0 m DDR_D1 1247 m 0 m -130 1 0.05 TOP 45 m BOT 0 m IN1 1202 m IN2 0 m DDR_D2 1236 m 0 m 0 1 0.05 TOP 1236 m BOT 0 m IN1 0 m IN2 0 m DDR_D3 1238 m 0 m -130 1 0.05 TOP 43 m BOT 0 m IN1 1195 m IN2 0 m DDR_D4 1237 m 0 m -130 1 0.05 TOP 46 m BOT 0 m IN1 0 m IN2 1191 m DDR_D5 1240 m 0 m -131 1 0.05 TOP 45 m BOT 0 m IN1 1195 m IN2 0 m DDR_D6 1246 m 0 m 0 1 0.05 TOP 1246 m BOT 0 m IN1 0 m IN2 0 m DDR_D7 1235 m 0 m -132 1 0.05 TOP 1086 m BOT 0 m IN1 150 m IN2 0 m DDR_D8 1238 m 0 m -133 1 0.05 TOP 102 m BOT 0 m IN1 1136 m IN2 0 m DDR_D9 1237 m 0 m -135 1 0.05 TOP 51 m BOT 0 m IN1 1186 m IN2 0 m DDR_D10 1243 m 0 m -135 1 0.05 TOP 46 m BOT 0 m IN1 1197 m IN2 0 m DDR_D11 1239 m 0 m -135 1 0.05 TOP 45 m BOT 1194 m IN1 0 m IN2 0 m DDR_D12 1237 m 0 m -135 1 0.05 TOP 46 m BOT 1191 m IN1 0 m IN2 0 m DDR_D13 1233 m 0 m -135 1 0.05 TOP 45 m BOT 0 m IN1 1188 m IN2 0 m DDR_D14 1242 m 0 m -137 1 0.05 TOP 44 m BOT 0 m IN1 1198 m IN2 0 m DDR_D15 1236 m 0 m -139 1 0.05 TOP 48 m BOT 0 m IN1 0 m IN2 1188 m DDR_DQM0 1334 m 0 m -139 1 0.05 TOP 44 m BOT 0 m IN1 0 m IN2 1290 m DDR_DQM1 1104 m 0 m -139 1 0.05 TOP 45 m BOT 0 m IN1 0 m IN2 1059 m DDR_DQS0 1416 m 0 m -139 1 0.05 TOP 47 m BOT 0 m IN1 0 m IN2 1368 m DDR_DQS1 1053 m 0 m -140 1 0.05 TOP 49 m BOT 1005 m IN1 0 m IN2 0 m DDR_DQSN0 1405 m 0 m -141 1 0.05 TOP 45 m BOT 0 m IN1 0 m IN2 1360 m DDR_DQSN1 1054 m 0 m -141 1 0.05 TOP 44 m BOT 1010 m IN1 0 m IN2 0 m DDR_ODT 346 m 0 m 0 1 0.05 TOP 346 m BOT 0 m IN1 0 m IN2 0 m DDR_RASN 594 m 0 m -68 1 0.05 TOP 51 m BOT 0 m IN1 0 m IN2 543 m DDR_RESETN 551 m 0 m -67 2 0.10 TOP 473 m BOT 78 m IN1 0 m IN2 0 m DDR_VREF 1095 m 0 m -67 8 0.38 TOP 67 m BOT 1028 m IN1 0 m IN2 0 m DDR_WEN 889 m 0 m -68 1 0.05 TOP 601 m BOT 289 m IN1 0 m IN2 0 m
However from your net length report I see that you have HUGE skew (some traces more than twice longer than others) in the Address/Control net class. Please refer to section 7.7.2.3 in the AM335X Datasheet Rev. G for DDR3 layout guidelines.
Hi Biser,
Thanks for your reply. Thanks for the pointer on the net lengths.
Could you confirm if this is the root cause of the issue we are seeing ? Did the DDR experts come back with anything else ?
Thanks in advance,
Warm Regards,
Harith
This is a severe violation of the layout rules. You cannot expect this to work at 400MHz. You could try lowest DDR3 frequency - 303MHz, but I'm not sure it will work either.