dm355 lcd interface with DE Signal instead of HSYNC and VSYNC

If you refer to the VPBE User Guide, you will notice that there is already an LCD_OE pin that can be used for DE interface.  To make use of this, you will need to program LCDOUT.OES and PINMUX1.DCLD register field accordingly.

With regards to putting picture onto OSD, I believe what you have may be enough, but you may want to use fbset command (see SPRUG92.pdf included with DVSDK) to check the current status of OSD window and make any changes if necessary.  fbset contronls OSD window, the video fsysy command control the encoder selection; assuming the default OSD settings are ok, then you are good to go, but just in case, you may want to double check this.  Also , what pixel format is your pic.png file in, remember OSD by default expects raw RGB565, by raw I mean only pixel data, with no header information in the file telling it how to process a PNG or other type of file format.

Hi Juan Gonzales ,

So thanks for your fast reply.

----If you refer to the VPBE User Guide, you will notice that there is already an LCD_OE pin that can be used for DE interface.  To make use of this, you will need to program LCDOUT.OES and PINMUX1.DCLD register field accordingly.

Where and how program LCDOUT.OES and PINMUX1.DCLD? In driver?

For OSD i used frida_720x480.yuv. I think i did a mistake.

I want to ask another question. Please forgive me:)

i mounted nfs  my host(suse 10.1) . When i copy files from host to dm355 i give "NFS server not responidng, still trying". What can i do for this problem.

So thanks.

Mehmet kurnaz

You are correct that register programming of the hardware should take place at the driver level.  You probrably want to refer to our V4L2 and/or FBDev driver.

   ti-davinci/drivers/media/video/davinci

   ti-davinci/drivers/video

With regards to the NFS issue, if I understand correctly, you are able to boot and NFS mount correctly, but get intermitent NFS server not responidng, still trying" after the system is up and running, correct?  I have seen this in a few ocassions when I was using a wireless network (e.g. weak signal).  This is usually the result of worn out cables or high network traffic in your network, in other words a weak network connection.  You can try creating your own local LAN between your Host and your EVM (using an off-the-shelf router) such that you have control of your network traffic; optionally you can connect directly to EVM without any network router by using static IPs.

Hi Juan,

I checked the ti-davinci/drivers/video/davinci/davinci_platform.c source code and in the davinci_anc_set_prgb() function the LCDOUT.OEE is enable. When i echo "LCD" to /sys/class/davinci_display/ch0/output it is OK. I can see LCD_OE signal.

How can i test LCD? How can i see a picture and a video  on LCD? I tried some thing in dvsdk_1_30_01_41 but  i can't did it.

So thanks.

Mehmet Kurnaz

To be honest, I have never interfaced to an LCD via DE interface.  Reading the specs, it appears LCD_OE serves the same porpuses as DE, meaning is only active when valid video data is available.  That said, the first thing I would do is to verify this is the case via an oscilloscope.  Then you will likely need to build a small daughter card which has the proper connector type to plug into LCD via DE interface (since you were attempting to do this, I assume you may have this already, except that you can get rid of the externel logic in your first post and use LCD_OE output instead).

Thanks Juan,

I already did it. I have a doughter card. I connected LCD. I check LCD_OE signal with ossiloscope, it likes right.

I tried examples, demos in dvsdk_1_30_01_41

PSP_01_20_00_014/examples/fbdev//utils/ rgbwrite, blank, blend, fbdev_loop

examples/ jpegdec, jpecenc dvevmdemo

But i can not see anything on LCD. How i can see image and video on LCD?  I am not sure, all of the signals are right. If i can't see picture i decide there is a problem.

So thanks.

Mehmet Kurnaz.

Hello Juan

I need your help.

I did a imageviewer that opens /dev/fb/0 and writes to it. I saw my image but there is problem. My lcd is 800X480. I configure it as 720X480. And there are a few images side by side 100x100 on bottom of  lcd. My images are 800x480.  What can i do?

So thanks.

Mehmet Kurnaz.

Can you post a screen capture?

Hi Juan,

I am not at office, and don't want to miss you. So i attached adsiz.jpg created at home. My LCD is 800x480. And in logic-pd driver i configured NON-STANDARD as 720x480. And echo to  sys-mode "NON-STANDARD".  I saw on lcd as adsiz.jpg. My image is 800x480 bitmap.

So thanks

Mehmet Kurnaz

Hi Juan,

I need your help.

My VAR_SCREEN_INFO:

Horizontal: 800
Vertical: 480
xres_virtual:900
yres_virtual:500
xoffset:0
yoffset:0
Bit per pixel: 16
activate:0
height:0
width:0
pixclock:36000
left_margin:50
right_margin:50
upper_margin:10
lower_margin:10
hsync_len:9
vsync_len:9
sync:16
vmode:0

And in davinci_platform.c i use enc_set_prgb() function.  DE signal is right. I see images on LCD but it is not normal. My image is 800x480 but it is minimized to 100x100. And there are 5 images side by side on top of LCD.

Which registers can i check?  It is urgent.

So thanks.

Mehmet Kurnaz

There are a few elements that control what you see

  1) image data in frame buffer ( you suggested you are writing data directly to /dev/fb/0)

  2) The pixel format  ( affects how image data is mapped to correct colors); per your comments, it appears you are choosing RGB pixel format.  An error here would cuase incorrect colors, not what you are seeing so no need to investigate an error in this step.

  3) video timing registers, which control HSYNC, VSYNC, FID to define valid video resolution.  (affect how much of the video data makes up a line and how many lines per frame).

One other factor that is not easily changeable would be the pixel clock (largely dependant on the hardware crystal chosen); this would affect to output image refresh rate (e.g. pixel clock = resolution x refresh rate) for a given resolution. 

That said, image data is read 32 bytes (16 pixels) at a time and placed on the data bus to LCD per the video timing registers; when video timing registers determine we have processed enough data to make up a line of video, and HSYNC pulse is generated (or in your case DE temporarily signal end of valid data); during this pulse, no further image data is read or processed.  Video timing registers eventually would reach end of HSYNC pulse (DE signals valid data again) and a new line of video is read. 

Given this, I cannot think of any way in which video timing registers (or pixel clock) could make your image smaller.  They could affect how much of the image you see, or maybe if you have a really bad image or garbage on the screen, they can even affect how fast you see your image.  But I cannot explain how they would resize your image and fit it in a smaller section of the screen.  I think you need to inestigate the source (e.g. image data) or the display settings (what resolution is it actually displaying).