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In my design, I need to use the NAND flash interface (GPMC) with two RMII interfaces. There are only two pins on AM3352 that can be used for rxer, J15 and U17. J15 is used by the 1st RMII and therefore U17 can only be used for the 2nd one. However, U17 is also the only pin available for wpn of GPMIC, which will cause a conflict.
In my design, the two RMII interfaces of AM3352 are connecting to two PHY chipsets (LAN8710) respectively. Based on the datasheet of LAN8710, the rxer signal from LAN8710 seems to be optional on RMII bus. Can I ignore this connection on the AM3352 for both PHY chipsets?
Another option is to always tie wpn pin of GPMC interface high so that it is NOT write protected all the time.
Which is the correct way of doing this?
