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RTOS/TMS320C6678: PCIe Boot: DDR Configuration of C6678

Part Number: TMS320C6678

Tool/software: TI-RTOS

Hi,

Platform: C6678

Software: MCSDK_2_01

As per the document http://www.ti.com/lit/er/sprz334h/sprz334h.pdf , Usage Note 14: DDR3 Performance Limited to 1333MT/s Usage Note,

I want to configure C6678 DDR controller to operate at 666MHz. C6678 board boots via PCIe and hence the DDR configuration code is sent from Host PC to C6678.

The DDR init code is included in an array "uint8_t ddrInitCode[] " in a header file.

I would like to get the procedure to update the DDR init code to change the DDR clock configuration from 800MHz(default) to 660MHz.

I am not able to find the specific DDR init code in the MCSDK/PDK of C6678. Could anyone point me to the exact location where/how I could make the updates and build it the DDRInit code? Thanks.

Regards,

Santosh

  • Hi Santosh,

    Are you running the TI RTOS SDK kernel & bootloader? If yes, then check:
    <PDK_INSTALL_PATH>/pdk_c667x_2_0_8/packages/ti/boot/ibl/src/make/bin/i2cConfig.gel

    If you're just running some bare metal code, you should be using a modified platform lib. Check the sources in pdk_c667x_2_0_8/packages/ti/platform/evmc6678l/platform_lib/src/evmc6678.c; see SetDDR3PllConfig() function.

    Else you can load the gel file (using CCS & JTAG) located in /pdk_c667x_2_0_8/packages/ti/platform/evmc6678l/gel/evmc6678.gel.

    Best Regards,
    Yordan
  • Hi Yordan,

    Thanks for your inputs. I am able to see SetDDR3PllConfig() function in the pdk folder.

    Since the Errata mentions that DDR3 cannot run at 800MHz and Max it can run at is 666MHz, are these updates done in the latest version of pdk?

    Regards,
    Santosh
  • Hi Santosh,

    All sw releases should comply with the erratas, so this should be fine in the latest pdk.

    Best Regards,
    Yordan