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TMS320C6655: Can I use CDCM61001RHBT for C6655

UNA
Mastermind 7980 points
Part Number: TMS320C6655
Other Parts Discussed in Thread: CDCM61001, CDCE62005

Hi,

I will select the reference clock IC for C6655.
Can CDCM61001RHBT be used as an external reference clock source for CORECLKp/n of C6655?

Best Regards,
H.U

  • 0
    TI__Guru**** 161600 points
    Hi,

    In general this part should be able to provide reference clock source for CORECLKp/n, but comparing CDCM61001 to the one used in TMDSEVM6657LS EVM CDCE62005 I see the following downside: CDCM61001 provides only one clock output, while CDE62005 provides five individually programmable outputs and can be used to source all reference clocks: PCIe_CLKp/n, MCM_CLKp/n, SRIO_SGMII_CLKp/n, DDR_CLKp/n and CORE_CLKp/n.

    So I'd recommend to stick with the clock generator used in the reference design TMDSEVM6657LS: CDCE62005.


    Best Regards,
    Yordan
  • 0 in reply to Yordan Kovachev
    TI__Mastermind 46460 points

    H.U.,

    Please list the clocks that are needed for your implementation and the planned frequencies.  Some of the clock inputs have more restrictive requirements than others.  The reference clock discussion in the Hardware Design Guide for KeyStone I Devices Application Report (SPRABI2C) provides detailed design guidance.

    Tom

  • 0 in reply to Tom Johnson 16214
    Mastermind 7980 points
    I only use CORECLKp/n with 122.88Mhz. Other than CORECLK will not be used.
    So, a single output clock IC is enough for me.

    Best Regards,
    H.U
  • 0 in reply to UNA
    TI__Mastermind 42545 points
    Hi H.U,
    You will need to provide a clock for the DDRCLK input as well, even if you are not planning on using the DDR. The clock does not have to meet the jitter requirements for DDR but must be present for the SoC to operate correctly. The clock is used to place the internal DDR IP into a default state. If it is not present, the DDR interface will draw more power than specified.
    Regards, Bill