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[TDA4VM][TPS65941X] About warm reset

Manwoo Kim
Intellectual 565 points
Other Parts Discussed in Thread: TDA4VM

Hi,

I have some qestions about TDA4VM & TPS65941X.

In the EVM's power sequence, there is H_RSTOUTn relased last sequence.

Is it warm reset out? If it is warm reset out, Does it mean out of TDA4VM's MCU_RESETSTATZ pin & RESETSTATZ pin?

Plus, Even if the warm reset signal(MCU_RESETZ, RESET_REQZ) reach to TDA4VM earlier than cold reset, is warm reset out slower than cold reset out?

Please give me a answer!

Thanks,

Manwoo Kim

  • 0
    TI__Genius 15120 points

    Hi Manwoo Kim,

    Can you please point to the document where you are seeing H_RSTOUTn? For example I can't see it on the schematics.

    You are right, RSTOUT is a name of warm reset out in earlier SoC's , so maybe it is a leftover from older document.

    Regarding your second question, these general rules apply:

    - Cold reset (POR is one of them) is a fundamental reset - everything in the SoC is being reset.

    - Warm reset  is used when SoC has undergone at least one cold reset and part of startup procedures are not needed to be executed again  (for example, efuse load, PLL lock, etc)

    - If cold reset is being asserted, warm reset is always asserted too.

    - If Warm reset is asserted, cold reset isn't asserted automatically.

    Therefore, if warm reset reaches SoC earlier than cold reset, it doesn't matter, as cold reset initiates its own sequence followed every time. This sequence includes the warm reset assertion/deassertion in it.

    regards,

    Stan

  • 0 in reply to Stanislav Stilyanov
    Intellectual 565 points

    Hi, Stan.

    Thanks for your reply.

    I saw the document which is J721E_EVM_Leo_SOC_PDN_Detail_EngNotes_v0.36.pdf

    Please check the document and give me a comment about range of the H_RSTOUTn.

    Thanks,

    Manwoo Kim

  • 0 in reply to Manwoo Kim
    TI__Genius 15120 points

    Can you please post the image here?

    What I found from reset specs is:

    TDA4 has two domains with independent reset architectures: MCU and MAIN.

    MCU resets will always reset MAIN domain too.

    MAIN can be reset independently, without affecting MCU - MCU is isolated from MAIN resets.

    Therefore, two RESET STATUS pins exist - MCU RESETSTAT and MAIN RESETSTAT. These pins indicate internal reset status and can be used as warm reset outputs to external devices/circuitry.

    - MCU_RESETSTATz will stay asserted ~5 ms after MCU_PORz deassertion (cold reset)

    - MCU_RESETSTATz will stay asserted ~300 us after MCU_RESETz deassertion (warm reset)

    - RESETSTATz will stay asserted ~10 ms after PORz  or MCU_PORz deassertion (cold reset)

    - RESETSTATz will stay asserted ~300 us after RESET_REQz or MCU_RESETz deassertion (warm reset). This time can be longer if there is reset-isolated peripherals that need to be protected from warm resets.

    Regards,

    Stan

  • 0 in reply to Stanislav Stilyanov
    Intellectual 565 points

    Hi, Stan.

    Thanks for your reply!

    I posted sequence image in the below.

    Actually, I don't understand clearly.

    - MCU_RESETSTATz will stay asserted ~300 us after MCU_RESETz deassertion (warm reset)

     --> It can be possible when MCU_PORz is alreay deassertion. Is it right? If MCU_PORz is not assertion, MCU_RESETz can't be asserted. Right?

    - RESETSTATz will stay asserted ~10 ms after PORz  or MCU_PORz deassertion (cold reset)

    - RESETSTATz will stay asserted ~300 us after RESET_REQz or MCU_RESETz deassertion (warm reset).

     --> Why RESETSTATz is effected from MCU_RESETz and MCU_RESETz?

    Power on Sequence

    Could you please give me comments?

    Thanks,

    Manwoo Kim

  • 0 in reply to Manwoo Kim
    TI__Genius 15120 points

    - MCU_RESETSTATz will stay asserted ~300 us after MCU_RESETz deassertion (warm reset)

     --> It can be possible when MCU_PORz is alreay deassertion. Is it right? If MCU_PORz is not assertion, MCU_RESETz can't be asserted. Right?

    ----> Right, MCU_POR reset is higher priority.  ------> MCU_PORz and MCU_RESETz are controlled by external sources, that's why it is perfectly possible both are asserted at the same time, but PORz is higher priority

    - RESETSTATz will stay asserted ~10 ms after PORz  or MCU_PORz deassertion (cold reset)

    - RESETSTATz will stay asserted ~300 us after RESET_REQz or MCU_RESETz deassertion (warm reset).

     --> Why RESETSTATz is effected from MCU_RESETz and MCU_RESETz?

    -------> As I said in the previous post, MCU is sort of 'master' domain. MCU resets will always cause reset of the MAIN domain too.