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Hi TI,
I saw the 1x CSI output in TDA4.
I wonder :
q1) this CSI output of TDA4 is same one with CSI input from sensor to TDA4 ?
q2) I think that CSI output has advantage for no needing more MIPI switch, external.
Does this CSI output bypass at the pre-stage in TDA4 camera module ? (no burden for cpu core)
Thanks.
Hello,
Minwoo Song said:q1) this CSI output of TDA4 is same one with CSI input from sensor to TDA4 ?
Yes, it is similar, with some differences obviously since it's an output.
Minwoo Song said:q2) I think that CSI output has advantage for no needing more MIPI switch, external.
Do you mean MIPI D-PHY? You still need to configure the external D-PHY transmitter.
Minwoo Song said:Does this CSI output bypass at the pre-stage in TDA4 camera module ? (no burden for cpu core)
From hardware functional perspective, the CSI output has a direct loopback path from the CSI receiver for diagnostic and test purposes, so in this case, there is no overhead in the rest of the device.
Please refer to the Technical Reference Manual (TRM) chapter "12.7.2 Camera Streaming Interface Transmitter (CSI_TX_IF)" for details. You will get a better understanding of it there.
hope it helps,
Alex
Hi Alex,
Very thanks for your fast and detail answer.
for Q2, I mean the MIPI CSI switch, not DSI.
if some SoC doesn't have CSI output i/f, and it needs to consider external MIPI CSI switch before input.
I wanna say, TDA4 might save the extra switch IC for making CSI output.
q2) I think that CSI output has advantage for no needing more MIPI switch, external. |
Thanks.
Hello,
Minwoo Song said:I wanna say, TDA4 might save the extra switch IC for making CSI output.
q2) I think that CSI output has advantage for no needing more MIPI switch, external.
Ok, not sure about this one, I'll leave to someone else to comment here.
Alex Bashkov said:From hardware functional perspective, the CSI output has a direct loopback path from the CSI receiver for diagnostic and test purposes, so in this case, there is no overhead in the rest of the device.
Actually we just synced with the SDK team on this, and the direct path from CSIRX -> CSITX is descoped and no longer supported. If this is a requirement, the memory path can be used (that is CSIRX -> DDR -> CSITX).
thanks,
Alex