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Original question:

AM3354: eMMC version support

AM3354: AM335X:mmc1: switch to bus width 8 failed

user5759638
Prodigy 60 points
Part Number: AM3354

Hi ti ,

    The am3354 cannot use 8-wire mode in emmc1.  SDK VER:ti-processor-sdk-linux-am335x-evm-06.01.00.08-Linux-x86-Install

    What is the reason?

   

     DTS:

    

&mmc2 {
vmmc-supply = <&vmmcsd_fixed>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_pins>;
bus-width = <8>;
status = "okay";
ti,non-removable;
};

root@:/home/user#cat sys/kernel/debug/mmc1/ios
clock: 52000000 Hz
vdd: 21 (3.3 ~ 3.4 V)
bus mode: 2 (push-pull)
chip select: 0 (don't care)
power mode: 2 (on)
bus width: 2 (4 bits)
timing spec: 1 (mmc high-speed)
signal voltage: 0 (3.30 V)
driver type: 0 (driver type B)

log:

[ 1.672359] omap_hsmmc 481d8000.mmc: omap_hsmmc_set_bus_width ios->timing=1 ios->bus_width=0
[ 1.680990] omap_hsmmc 481d8000.mmc: Set clock to 400000Hz
[ 1.686838] omap_hsmmc 481d8000.mmc: omap_hsmmc_set_bus_width ios->timing=1 ios->bus_width=0
[ 1.695431] omap_hsmmc 481d8000.mmc: Set clock to 52000000Hz
[ 1.701433] omap_hsmmc 481d8000.mmc: omap_hsmmc_set_bus_width ios->timing=1 ios->bus_width=3
[ 1.710020] omap_hsmmc 481d8000.mmc: Set clock to 52000000Hz
[ 1.716069] mmc1: switch to bus width 8 failed
[ 1.720589] omap_hsmmc 481d8000.mmc: omap_hsmmc_set_bus_width ios->timing=1 ios->bus_width=2
[ 1.729175] omap_hsmmc 481d8000.mmc: Set clock to 52000000Hz
[ 1.735710] mmc1: new high speed MMC card at address 0001
[ 1.742154] mmcblk1: mmc1:0001 004G60 3.69 GiB
[ 1.747295] mmcblk1boot0: mmc1:0001 004G60 partition 1 2.00 MiB
[ 1.753768] mmcblk1boot1: mmc1:0001 004G60 partition 2 2.00 MiB
[ 1.759963] mmcblk1rpmb: mmc1:0001 004G60 partition 3 512 KiB, chardev (244:0)
[ 1.768814] mmcblk1: p1 p2 p3

  • 0
    TI__Guru* 82385 points

    Hello,

    Are you using a TI EVM, or a custom board?

    Please take a look at these posts for some ideas about debugging MMC:
    Custom board eMMC issue
    eMMC Configuration Issue

    Regards,

    Nick

  • 0 in reply to Nick Saulnier
    Prodigy 60 points

    Hi ti,

           The emmc is THGBMDG5D1LBAIL 4GB eMMC 5.0 Toshiba.  But AM3354 support V4.3.

           Does it have anything to do with this?

         

           I've heard from hardware engineers that it can support 8-bit emMC with the old emmc V4.41。

           Is that OK？

          

           The function call relationship is as follows:

            mmc_select_bus_width--->mmc_compare_ext_csds-->mmc_get_ext_csd-->mmc_send_cxd_data

           in mmc_send_cxd_data  return -84

  • 0 in reply to user5759638
    Prodigy 60 points

    emmc_pins: pinmux_emmc_pins {
    pinctrl-single,pins = <
    AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
    AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
    AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
    AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
    AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
    AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
    AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
    AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
    AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
    AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
    >;
    };

  • 0 in reply to Nick Saulnier
    Prodigy 60 points

    Can you share the READING and writing speed of AM3354 EMMC.
    I used the DD command to test out about 22M/S

    echo 3 > /proc/sys/vm/drop_caches

    dd if=/dev/mmcblk1 of=/dev/null bs=16k count=65536

  • 0 in reply to user5759638
    TI__Guru* 82385 points

    Hello,

    I apologize for the delayed response. Your pinmuxing looks fine. As long as the EMMC can run according to the v4.41 spec, I would expect that EMMC to work ok.

    Let me know if you need further assistance with this.

    Regards,

    Nick