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AM3352: Does 2x 8-bit wide DDR have to do Software Leveling

Daniel Cheng1
Mastermind 6355 points
Part Number: AM3352

Hi Expert,

AM3352: DDR3 tDQSS out of specification - Processors forum - Processors - TI E2E support forums

e2e.ti.com
Part Number: AM3352 Hi Expert My customer do the DDR3 Write Data Signal Integrity Test. But the DQSL is out of spec. Could you give some suggestions for

Doese it mean that 16-bit wide DDR DON'T have to do Software Leveling, is it correct?

Does I have to do Software Leveling if my design is 2x 8-bit wide DDR?

Do I need JTAG interface If I have to do Software Leveling?

Could I do Software Leveling via SD card?

Thanks

Daniel

  • 0
    TI__Guru* 80020 points

    Daniel, software leveling is required if your DDR layout implements a fly by topology.  I'm assuming this is what you have since you are using 2x 8-bit wide DDRs.  The software leveling algorithm will calculate the appropriate registers which adjust the address/command delays for each of the memories on the bus.  The algorithm is run via JTAG.  Please see the following appnote:    https://www.ti.com/lit/pdf/sprack4

    Regards,

    James