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Hi Expert
My customer do the DDR3 Write Data Signal Integrity Test.
But the DQSL is out of spec. Could you give some suggestions for how to fine tune?
He has modified the values according EMIF
Daniel
Daniel, using the AM335x EMIF Tool https://www.ti.com/lit/pdf/sprack4 should result in proper configuration. Can you please post the .xls with your board configuration, and the DDR part number? Can you confirm all design guidelines in the AM335x datasheet were followed, especially trace length specifications?
Regards,
James
Hi James
Could I get the optimize parameters by the MLO?
I don't know how to do the step 1 "SD card with the MLO inside the FAT32 disk", is there any document?
Thanks
Daniel
Daniel -- the documentation you are referencing is out of date. It is no longer necessary to even run the leveling program if you're using a single 16-bit wide DDR. In other words, the software leveling program is only used for designs using two 8-bit wide DDR3 devices, which is rare. Please fill out the spreadsheet that is referenced in the app note. It is a critical starting point. Once you've gone through the process, I expect things will work fine.