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Hi,
I've seen can0 and can1 in terminal by ifconfig -a with the method you supplied(https://e2e.ti.com/support/processors/f/791/t/922168) and can set can0/can1 up. Thanks!
However, i meets another problem: when i execute "cansend can0 113##2AAAAAAAA", then returned info "m_can_platform 2701000.mcan can0: bus-off".
The changes are as follows:
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 6788a3611..b223fc97d 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -164,6 +164,21 @@ }; &main_pmx0 { + + mcan0_gpio_pins_default: mcan0_gpio_pins_default { + pinctrl-single,pins = < + J721E_IOPAD(0x0208, PIN_INPUT, 0) /* (W5) MCAN0_RX:GPIO1_1 */ + J721E_IOPAD(0x020c, PIN_OUTPUT, 0) /* (W6) MCAN0_TX:GPIO1_2 */ + >; + }; + + mcan2_gpio_pins_default: mcan2_gpio_pins_default { + pinctrl-single,pins = < + J721E_IOPAD(0x01f0, PIN_INPUT, 3) /* (AC2) MCAN2_RX.GPIO0_123 */ + J721E_IOPAD(0x01f4, PIN_OUTPUT, 3) /* (AB1) MCAN2_TX.GPIO0_124 */ + >; + }; + sw10_button_pins_default: sw10_button_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x0, PIN_INPUT, 7) /* (AC18) EXTINTn.GPIO0_0 */ @@ -180,6 +195,37 @@ pinctrl-single,pins = < J721E_IOPAD(0x230, PIN_INPUT, 7) /* (U2) ECAP0_IN_APWM_OUT.GPIO1_11 */ >; + p06 { + /* P06 - MCAN0_EN */ + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "MCAN0_EN"; + }; + + p07 { + /* P07 - MCAN0_STB# */ + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "MCAN0_STB#"; + }; + + p13 { + /* P13 - MLB_MUX_SEL */ + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "MLB_MUX_SEL"; + }; + + p14 { + /* P14 - MCAN_MUX_SEL */ + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "MCAN_MUX_SEL"; + }; }; main_i2c0_pins_default: main-i2c0-pins-default { @@ -350,6 +396,15 @@ status = "disabled"; }; +&main_gpio0 { + p127 { + gpio-hog; + gpios = <127 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "MCAN2_STB"; + }; +}; + &main_gpio2 { status = "disabled"; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index c036df124..e5d84e44d 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -1148,6 +1148,34 @@ clock-names = "gpio"; }; + m_can0: mcan@2701000 { + compatible = "bosch,m_can"; + reg = <0x0 0x2701000 0x0 0x200>, + <0x0 0x2708000 0x0 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 156 1>, <&k3_clks 156 0>; + clock-names = "cclk", "hclk"; + interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>; + }; + + m_can2: mcan@2721000 { + compatible = "bosch,m_can"; + reg = <0x0 0x2721000 0x0 0x200>, + <0x0 0x2728000 0x0 0x8000>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 160 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 160 1>, <&k3_clks 160 0>; + clock-names = "cclk", "hclk"; + interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>; + }; + main_gpio2: gpio@610000 { compatible = "ti,j721e-gpio", "ti,keystone-gpio"; reg = <0x0 0x00610000 0x0 0x100>; -- 2.17.1
Regards
Hi,
We will look into this and give you a feedback shortly - in the next day or two.
Can you please confirm that you are reporting this issue on the TI TDA4VM EVM and not on a custom board?
Regards
Karthik
Hi,
The problem seems to be that the CAN message is not going out on the wire - and the controller might be trying to retransmit the same message again and again and hence pulling the CAN bus to a bus-off state. This is a state when the number of errors exceed a certain threshold.
The message not successfully transmitting on the wire could be because of multiple reasons like:
I reviewed your patch (assuming this is the only change) and I see some problems:
1. You are not pinmuxing the m_can0 and m_can2
There is no pinctrl-0 field for both these nodes. This will not allow the controller to push out data from the SoC out to the transceiver and then to the CAN node. Please review the FAQ https://e2e.ti.com/support/processors/f/791/t/922168 and search for the pinctrl-0 field. The pinmux is done in the k3-j721e-common-proc-board.dts. Please add these node references to your patch.
Note that along with the pinmux for the CAN Tx and CAN Rx we also need to mux the signals which enable the CAN transceivers. (explained in point 2)
2. The GPIO0_127 is not pinmuxed needed for MCAN2 transceiver
You are pulling the GPIO0_127 low by hogging it in main_gpio0 { ... } node. But the problem here is that you also need to pinmux this signal for the value to take in effect.
This GPIO0_127 feeds in via a 2:1 MUX to the MCAN2_STB signal.
To pinmux this please see the mygpio1_pins_default {...} node in the same patch in file k3-j721e-common-proc-board.dts
I believe with the above fixed you should be good to go.
With the current status one good test would be to run in internal loopback mode. In this mode there is no need for the data from the controller to come out of the SoC and hence this will remove the Pinmux and transceiver dependencies. If this fails it could be because the nodes status is not enabled (see k3-j721e-common-proc-board.dts - &m_can0 {...} node's status field. This is not there in your case.)
To test internal loopback, please refer the same FAQ https://e2e.ti.com/support/processors/f/791/t/922168 . I have updated the section under Debug tips.
Regards,
Karan
Hi,
Thansk for your reply.
After use your patch of the .dts file, we can test internal loopback mode ok. But it still can not output normally.
// SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ */ /dts-v1/; #include "k3-j721e-som-p0.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/sound/ti-mcasp.h> #include <dt-bindings/net/ti-dp83867.h> / { chosen { stdout-path = "serial2:115200n8"; bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000"; }; gpio_keys: gpio-keys { compatible = "gpio-keys"; autorepeat; pinctrl-names = "default"; pinctrl-0 = <&sw10_button_pins_default &sw11_button_pins_default>; sw10: sw10 { label = "GPIO Key USER1"; linux,code = <BTN_0>; gpios = <&main_gpio0 0 GPIO_ACTIVE_LOW>; }; sw11: sw11 { label = "GPIO Key USER2"; linux,code = <BTN_1>; gpios = <&wkup_gpio0 7 GPIO_ACTIVE_LOW>; }; }; evm_12v0: fixedregulator-evm12v0 { /* main supply */ compatible = "regulator-fixed"; regulator-name = "evm_12v0"; regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; regulator-always-on; regulator-boot-on; }; vsys_3v3: fixedregulator-vsys3v3 { /* Output of LMS140 */ compatible = "regulator-fixed"; regulator-name = "vsys_3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&evm_12v0>; regulator-always-on; regulator-boot-on; }; vsys_5v0: fixedregulator-vsys5v0 { /* Output of LM5140 */ compatible = "regulator-fixed"; regulator-name = "vsys_5v0"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; vin-supply = <&evm_12v0>; regulator-always-on; regulator-boot-on; }; /* Used for 48KHz family */ pll4: pll4_fixed { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <1179648000>; }; /* Used for 44.1KHz family */ pll15: pll15_fixed { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <1083801600>; }; sound0: sound@0 { compatible = "ti,j721e-cpb-audio"; ti,model = "j721e-cpb-analog"; ti,cpb-mcasp = <&mcasp10>; ti,cpb-codec = <&pcm3168a_1>; clocks = <&pll4>, <&pll15>, <&k3_clks 184 1>, <&k3_clks 184 2>, <&k3_clks 184 4>, <&k3_clks 157 371>, <&k3_clks 157 400>, <&k3_clks 157 401>; clock-names = "pll4", "pll15", "cpb-mcasp", "cpb-mcasp-48000", "cpb-mcasp-44100", "audio-refclk2", "audio-refclk2-48000", "audio-refclk2-44100"; }; vdd_mmc1: fixedregulator-sd { compatible = "regulator-fixed"; regulator-name = "vdd_mmc1"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; enable-active-high; vin-supply = <&vsys_3v3>; gpio = <&exp2 2 GPIO_ACTIVE_HIGH>; }; vdd_sd_dv_alt: gpio-regulator-TLV71033 { compatible = "regulator-gpio"; pinctrl-names = "default"; pinctrl-0 = <&vdd_sd_dv_alt_pins_default>; regulator-name = "tlv71033"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-boot-on; vin-supply = <&vsys_5v0>; gpios = <&main_gpio0 117 GPIO_ACTIVE_HIGH>; states = <1800000 0x0 3300000 0x1>; }; cpsw9g_virt_mac: main_r5fss_cpsw9g_virt_mac0 { compatible = "ti,j721e-cpsw-virt-mac"; dma-coherent; ti,psil-base = <0x4a00>; ti,remote-name = "mpu_1_0_ethswitch-device-0"; dmas = <&main_udmap 0xca00>, <&main_udmap 0xca01>, <&main_udmap 0xca02>, <&main_udmap 0xca03>, <&main_udmap 0xca04>, <&main_udmap 0xca05>, <&main_udmap 0xca06>, <&main_udmap 0xca07>, <&main_udmap 0x4a00>; dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", "rx"; virt_emac_port { ti,label = "virt-port"; /* local-mac-address = [0 0 0 0 0 0]; */ }; }; dp0: connector { compatible = "dp-connector"; label = "DP0"; port { dp_connector_in: endpoint { remote-endpoint = <&dp_bridge_output>; }; }; }; }; &m_can0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcan0_gpio_pins_default>; can-transceiver { max-bitrate = <5000000>; }; }; &m_can2 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcan2_gpio_pins_default &mygpio1_pins_default>; can-transceiver { max-bitrate = <5000000>; }; }; &main_pmx0 { mygpio1_pins_default: mygpio1_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x200, PIN_INPUT, 7) /* (AC4) UART1_CTSn.GPIO0_127 */ >; }; mcan0_gpio_pins_default: mcan0_gpio_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x0208, PIN_INPUT, 0) /* (W5) MCAN0_RX:GPIO1_1 */ J721E_IOPAD(0x020c, PIN_OUTPUT, 0) /* (W6) MCAN0_TX:GPIO1_2 */ >; }; mcan2_gpio_pins_default: mcan2_gpio_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x01f0, PIN_INPUT, 3) /* (AC2) MCAN2_RX.GPIO0_123 */ J721E_IOPAD(0x01f4, PIN_OUTPUT, 3) /* (AB1) MCAN2_TX.GPIO0_124 */ >; }; sw10_button_pins_default: sw10_button_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x0, PIN_INPUT, 7) /* (AC18) EXTINTn.GPIO0_0 */ >; }; dp0_pins_default: dp0_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x1c4, PIN_INPUT, 5) /* SPI0_CS1.DP0_HPD */ >; }; main_i2c1_exp4_pins_default: main-i2c1-exp4-pins-default { pinctrl-single,pins = < J721E_IOPAD(0x230, PIN_INPUT, 7) /* (U2) ECAP0_IN_APWM_OUT.GPIO1_11 */ >; p06 { /* P06 - MCAN0_EN */ gpio-hog; gpios = <6 GPIO_ACTIVE_HIGH>; output-high; line-name = "MCAN0_EN"; }; p07 { /* P07 - MCAN0_STB# */ gpio-hog; gpios = <7 GPIO_ACTIVE_HIGH>; output-high; line-name = "MCAN0_STB#"; }; p13 { /* P13 - MLB_MUX_SEL */ gpio-hog; gpios = <11 GPIO_ACTIVE_HIGH>; output-low; line-name = "MLB_MUX_SEL"; }; p14 { /* P14 - MCAN_MUX_SEL */ gpio-hog; gpios = <12 GPIO_ACTIVE_HIGH>; output-low; line-name = "MCAN_MUX_SEL"; }; }; main_i2c0_pins_default: main-i2c0-pins-default { pinctrl-single,pins = < J721E_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (AC5) I2C0_SCL */ J721E_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (AA5) I2C0_SDA */ >; }; main_i2c1_pins_default: main-i2c1-pins-default { pinctrl-single,pins = < J721E_IOPAD(0x228, PIN_INPUT_PULLUP, 0) /* (Y6) I2C1_SCL */ J721E_IOPAD(0x22c, PIN_INPUT_PULLUP, 0) /* (AA6) I2C1_SDA */ >; }; main_i2c3_pins_default: main-i2c3-pins-default { pinctrl-single,pins = < J721E_IOPAD(0x270, PIN_INPUT_PULLUP, 4) /* (T26) MMC2_CLK.I2C3_SCL */ J721E_IOPAD(0x274, PIN_INPUT_PULLUP, 4) /* (T25) MMC2_CMD.I2C3_SDA */ >; }; main_i2c6_pins_default: main-i2c6-pins-default { pinctrl-single,pins = < J721E_IOPAD(0x1d0, PIN_INPUT_PULLUP, 2) /* (AA3) SPI0_D1.I2C6_SCL */ J721E_IOPAD(0x1e4, PIN_INPUT_PULLUP, 2) /* (Y2) SPI1_D1.I2C6_SDA */ >; }; mcasp10_pins_default: mcasp10_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x158, PIN_OUTPUT_PULLDOWN, 12) /* (U23) RGMII5_TX_CTL.MCASP10_ACLKX */ J721E_IOPAD(0x15c, PIN_OUTPUT_PULLDOWN, 12) /* (U26) RGMII5_RX_CTL.MCASP10_AFSX */ J721E_IOPAD(0x160, PIN_OUTPUT_PULLDOWN, 12) /* (V28) RGMII5_TD3.MCASP10_AXR0 */ J721E_IOPAD(0x164, PIN_OUTPUT_PULLDOWN, 12) /* (V29) RGMII5_TD2.MCASP10_AXR1 */ J721E_IOPAD(0x170, PIN_OUTPUT_PULLDOWN, 12) /* (U29) RGMII5_TXC.MCASP10_AXR2 */ J721E_IOPAD(0x174, PIN_OUTPUT_PULLDOWN, 12) /* (U25) RGMII5_RXC.MCASP10_AXR3 */ J721E_IOPAD(0x198, PIN_INPUT_PULLDOWN, 12) /* (V25) RGMII6_TD1.MCASP10_AXR4 */ J721E_IOPAD(0x19c, PIN_INPUT_PULLDOWN, 12) /* (W27) RGMII6_TD0.MCASP10_AXR5 */ J721E_IOPAD(0x1a0, PIN_INPUT_PULLDOWN, 12) /* (W29) RGMII6_TXC.MCASP10_AXR6 */ >; }; audi_ext_refclk2_pins_default: audi_ext_refclk2_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x1a4, PIN_OUTPUT, 3) /* (W26) RGMII6_RXC.AUDIO_EXT_REFCLK2 */ >; }; main_mmc1_pins_default: main_mmc1_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x254, PIN_INPUT, 0) /* (R29) MMC1_CMD */ J721E_IOPAD(0x250, PIN_INPUT, 0) /* (P25) MMC1_CLK */ J721E_IOPAD(0x2ac, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */ J721E_IOPAD(0x24c, PIN_INPUT, 0) /* (R24) MMC1_DAT0 */ J721E_IOPAD(0x248, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */ J721E_IOPAD(0x244, PIN_INPUT, 0) /* (R25) MMC1_DAT2 */ J721E_IOPAD(0x240, PIN_INPUT, 0) /* (R26) MMC1_DAT3 */ J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */ J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */ >; }; vdd_sd_dv_alt_pins_default: vdd_sd_dv_alt_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x1d8, PIN_INPUT, 7) /* (W4) SPI1_CS1.GPIO0_117 */ >; }; main_usbss0_pins_default: main_usbss0_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */ J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */ >; }; main_usbss1_pins_default: main_usbss1_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x214, PIN_OUTPUT, 4) /* (V4) MCAN1_TX.USB1_DRVVBUS */ >; }; }; &wkup_pmx0 { sw11_button_pins_default: sw11_button_pins_default { pinctrl-single,pins = < J721E_WKUP_IOPAD(0xcc, PIN_INPUT, 7) /* (G28) WKUP_GPIO0_7 */ >; }; mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default { pinctrl-single,pins = < J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */ J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */ J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */ J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */ J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */ J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */ J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */ J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */ >; }; }; &wkup_pmx0 { mcu_cpsw_pins_default: mcu_cpsw_pins_default { pinctrl-single,pins = < J721E_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */ J721E_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */ J721E_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */ J721E_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */ J721E_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */ J721E_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */ J721E_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */ J721E_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */ J721E_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */ J721E_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */ J721E_WKUP_IOPAD(0x0070, PIN_INPUT, 0) /* MCU_RGMII1_TXC */ J721E_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* MCU_RGMII1_RXC */ >; }; mcu_mdio_pins_default: mcu_mdio1_pins_default { pinctrl-single,pins = < J721E_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* MCU_MDIO0_MDC */ J721E_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* MCU_MDIO0_MDIO */ >; }; }; &wkup_uart0 { /* Wakeup UART is used by System firmware */ status = "disabled"; }; &main_uart0 { power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>; }; &main_uart3 { /* UART not brought out */ status = "disabled"; }; &main_uart5 { /* UART not brought out */ status = "disabled"; }; &main_uart6 { /* UART not brought out */ status = "disabled"; }; &main_uart7 { /* UART not brought out */ status = "disabled"; }; &main_uart8 { /* UART not brought out */ status = "disabled"; }; &main_uart9 { /* UART not brought out */ status = "disabled"; }; &main_gpio0 { p127 { gpio-hog; gpios = <127 GPIO_ACTIVE_HIGH>; output-low; line-name = "MCAN2_STB"; }; }; &main_gpio2 { status = "disabled"; }; &main_gpio3 { status = "disabled"; }; &main_gpio4 { status = "disabled"; }; &main_gpio5 { status = "disabled"; }; &main_gpio6 { status = "disabled"; }; &main_gpio7 { status = "disabled"; }; &wkup_gpio1 { status = "disabled"; }; &mailbox0_cluster0 { interrupts = <436>; mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { ti,mbox-rx = <2 0 0>; ti,mbox-tx = <3 0 0>; }; }; &mailbox0_cluster1 { interrupts = <432>; mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { ti,mbox-rx = <2 0 0>; ti,mbox-tx = <3 0 0>; }; }; &mailbox0_cluster2 { interrupts = <428>; mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 { ti,mbox-rx = <2 0 0>; ti,mbox-tx = <3 0 0>; }; }; &mailbox0_cluster3 { interrupts = <424>; mbox_c66_0: mbox-c66-0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; mbox_c66_1: mbox-c66-1 { ti,mbox-rx = <2 0 0>; ti,mbox-tx = <3 0 0>; }; }; &mailbox0_cluster4 { interrupts = <420>; mbox_c71_0: mbox-c71-0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; }; &mailbox0_cluster5 { status = "disabled"; }; &mailbox0_cluster6 { status = "disabled"; }; &mailbox0_cluster7 { status = "disabled"; }; &mailbox0_cluster8 { status = "disabled"; }; &mailbox0_cluster9 { status = "disabled"; }; &mailbox0_cluster10 { status = "disabled"; }; &mailbox0_cluster11 { status = "disabled"; }; &mcu_r5fss0_core0 { mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; }; &mcu_r5fss0_core1 { mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; }; &main_r5fss0_core0 { mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; }; &main_r5fss0_core1 { mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; }; &main_r5fss1_core0 { mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; }; &main_r5fss1_core1 { mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; }; &c66_0 { mboxes = <&mailbox0_cluster3 &mbox_c66_0>; }; &c66_1 { mboxes = <&mailbox0_cluster3 &mbox_c66_1>; }; &c71_0 { mboxes = <&mailbox0_cluster4 &mbox_c71_0>; }; &ospi1 { pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi1_pins_default>; flash@0{ compatible = "jedec,spi-nor"; reg = <0x0>; spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; spi-max-frequency = <40000000>; cdns,tshsl-ns = <60>; cdns,tsd2d-ns = <60>; cdns,tchsh-ns = <60>; cdns,tslch-ns = <60>; cdns,read-delay = <2>; #address-cells = <1>; #size-cells = <1>; }; }; &tscadc0 { adc { ti,adc-channels = <0 1 2 3 4 5 6 7>; }; }; &tscadc1 { adc { ti,adc-channels = <0 1 2 3 4 5 6 7>; }; }; &dss { status = "ok"; }; &dss_ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; dpi_out_real0: endpoint { remote-endpoint = <&dp_bridge_input>; }; }; }; &mhdp { status = "ok"; pinctrl-names = "default"; pinctrl-0 = <&dp0_pins_default>; }; &dp0_ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; dp_bridge_input: endpoint { remote-endpoint = <&dpi_out_real0>; }; }; port@1 { reg = <1>; dp_bridge_output: endpoint { remote-endpoint = <&dp_connector_in>; }; }; }; &main_i2c0 { pinctrl-names = "default"; pinctrl-0 = <&main_i2c0_pins_default>; clock-frequency = <400000>; exp1: gpio@20 { compatible = "ti,tca6416"; reg = <0x20>; gpio-controller; #gpio-cells = <2>; }; exp2: gpio@22 { compatible = "ti,tca6424"; reg = <0x22>; gpio-controller; #gpio-cells = <2>; p09 { /* P11 - MCASP/TRACE_MUX_S0 */ gpio-hog; gpios = <9 GPIO_ACTIVE_HIGH>; output-low; line-name = "MCASP/TRACE_MUX_S0"; }; p10 { /* P12 - MCASP/TRACE_MUX_S1 */ gpio-hog; gpios = <10 GPIO_ACTIVE_HIGH>; output-high; line-name = "MCASP/TRACE_MUX_S1"; }; }; }; &main_i2c1 { pinctrl-names = "default"; pinctrl-0 = <&main_i2c1_pins_default>; clock-frequency = <400000>; exp4: gpio@20 { compatible = "ti,tca6408"; reg = <0x20>; gpio-controller; #gpio-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&main_i2c1_exp4_pins_default>; interrupt-parent = <&main_gpio1>; interrupts = <11 IRQ_TYPE_EDGE_FALLING>; interrupt-controller; #interrupt-cells = <2>; p0 { /* P0 - DP0_PWR_SW_EN */ gpio-hog; gpios = <0 GPIO_ACTIVE_HIGH>; output-high; line-name = "DP0_PWR_SW_EN"; }; }; }; &k3_clks { /* Confiure AUDIO_EXT_REFCLK2 pin as output */ pinctrl-names = "default"; pinctrl-0 = <&audi_ext_refclk2_pins_default>; }; &main_i2c3 { pinctrl-names = "default"; pinctrl-0 = <&main_i2c3_pins_default>; clock-frequency = <400000>; exp3: gpio@20 { compatible = "ti,tca6408"; reg = <0x20>; gpio-controller; #gpio-cells = <2>; }; pcm3168a_1: audio-codec@44 { compatible = "ti,pcm3168a"; reg = <0x44>; #sound-dai-cells = <1>; reset-gpios = <&exp3 0 GPIO_ACTIVE_LOW>; /* C_AUDIO_REFCLK2 -> RGMII6_RXC (W26) */ clocks = <&k3_clks 157 371>; clock-names = "scki"; /* HSDIV3_16FFT_MAIN_4_HSDIVOUT2_CLK -> REFCLK2 */ assigned-clocks = <&k3_clks 157 371>; assigned-clock-parents = <&k3_clks 157 400>; assigned-clock-rates = <24576000>; /* for 48KHz */ VDD1-supply = <&vsys_3v3>; VDD2-supply = <&vsys_3v3>; VCCAD1-supply = <&vsys_5v0>; VCCAD2-supply = <&vsys_5v0>; VCCDA1-supply = <&vsys_5v0>; VCCDA2-supply = <&vsys_5v0>; }; }; &main_i2c6 { pinctrl-names = "default"; pinctrl-0 = <&main_i2c6_pins_default>; clock-frequency = <400000>; exp5: gpio@20 { compatible = "ti,tca6408"; reg = <0x20>; gpio-controller; #gpio-cells = <2>; }; }; &mcasp10 { #sound-dai-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&mcasp10_pins_default>; op-mode = <0>; /* MCASP_IIS_MODE */ tdm-slots = <2>; auxclk-fs-ratio = <256>; serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 1 1 1 1 2 2 2 0 >; tx-num-evt = <0>; rx-num-evt = <0>; status = "okay"; }; &mcu_cpsw { pinctrl-names = "default"; pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>; cpts { ti,pps = <3 1>; }; }; &davinci_mdio { phy0: ethernet-phy@0 { reg = <0>; ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; }; }; &cpsw_port1 { phy-mode = "rgmii-rxid"; phy-handle = <&phy0>; }; #define TS_OFFSET(pa, val) (0x4 + (pa) * 4) (0x10000 | val) ×ync_router { pinctrl-names = "default"; pinctrl-0 = <&mcu_cpts>; mcu_cpts: mcu_cpts { pinctrl-single,pins = < /* pps [cpts genf1] in17 -> out25 [cpts hw4_push] */ TS_OFFSET(25, 17) >; }; }; &main_sdhci0 { /* eMMC */ non-removable; ti,driver-strength-ohm = <50>; disable-wp; }; &main_sdhci1 { /* SD/MMC */ vmmc-supply = <&vdd_mmc1>; vqmmc-supply = <&vdd_sd_dv_alt>; pinctrl-names = "default"; pinctrl-0 = <&main_mmc1_pins_default>; disable-wp; }; &main_sdhci2 { /* Unused */ status = "disabled"; }; &serdes0 { serdes0_pcie_link: link@0 { reg = <0>; cdns,num-lanes = <1>; #phy-cells = <0>; cdns,phy-type = <PHY_TYPE_PCIE>; resets = <&serdes_wiz0 1>; }; }; &serdes1 { serdes1_pcie_link: link@0 { reg = <0>; cdns,num-lanes = <2>; #phy-cells = <0>; cdns,phy-type = <PHY_TYPE_PCIE>; resets = <&serdes_wiz1 1>, <&serdes_wiz1 2>; }; }; &serdes2 { serdes2_pcie_link: link@0 { reg = <0>; cdns,num-lanes = <2>; #phy-cells = <0>; cdns,phy-type = <PHY_TYPE_PCIE>; resets = <&serdes_wiz2 1>, <&serdes_wiz2 2>; }; }; &pcie0_rc { reset-gpios = <&exp1 6 GPIO_ACTIVE_HIGH>; phys = <&serdes0_pcie_link>; phy-names = "pcie_phy"; num-lanes = <1>; }; &pcie1_rc { reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>; phys = <&serdes1_pcie_link>; phy-names = "pcie_phy"; num-lanes = <2>; }; &pcie2_rc { reset-gpios = <&exp2 20 GPIO_ACTIVE_HIGH>; phys = <&serdes2_pcie_link>; phy-names = "pcie_phy"; num-lanes = <2>; }; &pcie0_ep { phys = <&serdes0_pcie_link>; phy-names = "pcie_phy"; num-lanes = <1>; status = "disabled"; }; &pcie1_ep { phys = <&serdes1_pcie_link>; phy-names = "pcie_phy"; num-lanes = <2>; status = "disabled"; }; &pcie2_ep { phys = <&serdes2_pcie_link>; phy-names = "pcie_phy"; num-lanes = <2>; status = "disabled"; }; &pcie3_rc { status = "disabled"; }; &pcie3_ep { status = "disabled"; }; &usb_serdes_mux { idle-states = <1>, <0>; /* USB0 to SERDES3, USB1 to SERDES1 */ }; &serdes_ln_ctrl { idle-states = <SERDES0_LANE0_PCIE0_LANE0>, <SERDES0_LANE1_PCIE0_LANE1>, <SERDES1_LANE0_PCIE1_LANE0>, <SERDES1_LANE1_PCIE1_LANE1>, <SERDES2_LANE0_PCIE2_LANE0>, <SERDES2_LANE1_PCIE2_LANE1>, <SERDES3_LANE0_USB3_0_SWAP>, <SERDES3_LANE1_USB3_0>, <SERDES4_LANE0_EDP_LANE0>, <SERDES4_LANE1_EDP_LANE1>, <SERDES4_LANE2_EDP_LANE2>, <SERDES4_LANE3_EDP_LANE3>; }; &serdes_wiz3 { typec-dir-gpios = <&main_gpio1 3 GPIO_ACTIVE_HIGH>; typec-dir-debounce-ms = <700>; /* TUSB321, tCCB_DEFAULT 133 ms */ }; &serdes3 { serdes3_usb_link: link@0 { reg = <0>; cdns,num-lanes = <2>; #phy-cells = <0>; cdns,phy-type = <PHY_TYPE_USB3>; resets = <&serdes_wiz3 1>, <&serdes_wiz3 2>; }; }; &usbss0 { pinctrl-names = "default"; pinctrl-0 = <&main_usbss0_pins_default>; ti,vbus-divider; }; &usb0 { dr_mode = "otg"; maximum-speed = "super-speed"; phys = <&serdes3_usb_link>; phy-names = "cdns3,usb3-phy"; }; &usbss1 { pinctrl-names = "default"; pinctrl-0 = <&main_usbss1_pins_default>; ti,usb2-only; }; &usb1 { dr_mode = "host"; maximum-speed = "high-speed"; }; /* uart2 assigned to cpsw9g eth-switch fw running on remote CPU core */ &main_uart2 { status = "disabled"; };
Hi,
What is the error?
Did you take care of the things I mentioned in https://e2e.ti.com/support/processors/f/791/p/950959/3515019#3515019 ?
Regards,
Karan
Hi,
I can't measure the signal on Rx pin(J24 pin2). And PCAN send the can msg and connect to the J27(pin 1 and pin 3).
Hi,
Maybe the tranceriver is not working.
Beacuse i measure the pin6 and pin14 of the U70, they are low level. Pin 9 is high level. Pin12 and Pin13 are normal .
Hi,
Good news. I fix the problem.
That is my issue, i set the exp2 p06,p07,p13,p14 in wrong position.
Now the new dts file can work fine.
// SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ */ /dts-v1/; #include "k3-j721e-som-p0.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/sound/ti-mcasp.h> #include <dt-bindings/net/ti-dp83867.h> / { chosen { stdout-path = "serial2:115200n8"; bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000"; }; gpio_keys: gpio-keys { compatible = "gpio-keys"; autorepeat; pinctrl-names = "default"; pinctrl-0 = <&sw10_button_pins_default &sw11_button_pins_default>; sw10: sw10 { label = "GPIO Key USER1"; linux,code = <BTN_0>; gpios = <&main_gpio0 0 GPIO_ACTIVE_LOW>; }; sw11: sw11 { label = "GPIO Key USER2"; linux,code = <BTN_1>; gpios = <&wkup_gpio0 7 GPIO_ACTIVE_LOW>; }; }; evm_12v0: fixedregulator-evm12v0 { /* main supply */ compatible = "regulator-fixed"; regulator-name = "evm_12v0"; regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; regulator-always-on; regulator-boot-on; }; vsys_3v3: fixedregulator-vsys3v3 { /* Output of LMS140 */ compatible = "regulator-fixed"; regulator-name = "vsys_3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&evm_12v0>; regulator-always-on; regulator-boot-on; }; vsys_5v0: fixedregulator-vsys5v0 { /* Output of LM5140 */ compatible = "regulator-fixed"; regulator-name = "vsys_5v0"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; vin-supply = <&evm_12v0>; regulator-always-on; regulator-boot-on; }; /* Used for 48KHz family */ pll4: pll4_fixed { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <1179648000>; }; /* Used for 44.1KHz family */ pll15: pll15_fixed { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <1083801600>; }; sound0: sound@0 { compatible = "ti,j721e-cpb-audio"; ti,model = "j721e-cpb-analog"; ti,cpb-mcasp = <&mcasp10>; ti,cpb-codec = <&pcm3168a_1>; clocks = <&pll4>, <&pll15>, <&k3_clks 184 1>, <&k3_clks 184 2>, <&k3_clks 184 4>, <&k3_clks 157 371>, <&k3_clks 157 400>, <&k3_clks 157 401>; clock-names = "pll4", "pll15", "cpb-mcasp", "cpb-mcasp-48000", "cpb-mcasp-44100", "audio-refclk2", "audio-refclk2-48000", "audio-refclk2-44100"; }; vdd_mmc1: fixedregulator-sd { compatible = "regulator-fixed"; regulator-name = "vdd_mmc1"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; enable-active-high; vin-supply = <&vsys_3v3>; gpio = <&exp2 2 GPIO_ACTIVE_HIGH>; }; vdd_sd_dv_alt: gpio-regulator-TLV71033 { compatible = "regulator-gpio"; pinctrl-names = "default"; pinctrl-0 = <&vdd_sd_dv_alt_pins_default>; regulator-name = "tlv71033"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-boot-on; vin-supply = <&vsys_5v0>; gpios = <&main_gpio0 117 GPIO_ACTIVE_HIGH>; states = <1800000 0x0 3300000 0x1>; }; cpsw9g_virt_mac: main_r5fss_cpsw9g_virt_mac0 { compatible = "ti,j721e-cpsw-virt-mac"; dma-coherent; ti,psil-base = <0x4a00>; ti,remote-name = "mpu_1_0_ethswitch-device-0"; dmas = <&main_udmap 0xca00>, <&main_udmap 0xca01>, <&main_udmap 0xca02>, <&main_udmap 0xca03>, <&main_udmap 0xca04>, <&main_udmap 0xca05>, <&main_udmap 0xca06>, <&main_udmap 0xca07>, <&main_udmap 0x4a00>; dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", "rx"; virt_emac_port { ti,label = "virt-port"; /* local-mac-address = [0 0 0 0 0 0]; */ }; }; dp0: connector { compatible = "dp-connector"; label = "DP0"; port { dp_connector_in: endpoint { remote-endpoint = <&dp_bridge_output>; }; }; }; }; &m_can0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcan0_gpio_pins_default>; can-transceiver { max-bitrate = <5000000>; }; }; &m_can2 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcan2_gpio_pins_default &mygpio1_pins_default>; can-transceiver { max-bitrate = <5000000>; }; }; &main_pmx0 { mygpio1_pins_default: mygpio1_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x200, PIN_INPUT, 7) /* (AC4) UART1_CTSn.GPIO0_127 */ >; }; mcan0_gpio_pins_default: mcan0_gpio_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x0208, PIN_INPUT, 0) /* (W5) MCAN0_RX:GPIO1_1 */ J721E_IOPAD(0x020c, PIN_OUTPUT, 0) /* (W6) MCAN0_TX:GPIO1_2 */ >; }; mcan2_gpio_pins_default: mcan2_gpio_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x01f0, PIN_INPUT, 3) /* (AC2) MCAN2_RX.GPIO0_123 */ J721E_IOPAD(0x01f4, PIN_OUTPUT, 3) /* (AB1) MCAN2_TX.GPIO0_124 */ >; }; sw10_button_pins_default: sw10_button_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x0, PIN_INPUT, 7) /* (AC18) EXTINTn.GPIO0_0 */ >; }; dp0_pins_default: dp0_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x1c4, PIN_INPUT, 5) /* SPI0_CS1.DP0_HPD */ >; }; main_i2c1_exp4_pins_default: main-i2c1-exp4-pins-default { pinctrl-single,pins = < J721E_IOPAD(0x230, PIN_INPUT, 7) /* (U2) ECAP0_IN_APWM_OUT.GPIO1_11 */ >; }; main_i2c0_pins_default: main-i2c0-pins-default { pinctrl-single,pins = < J721E_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (AC5) I2C0_SCL */ J721E_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (AA5) I2C0_SDA */ >; }; main_i2c1_pins_default: main-i2c1-pins-default { pinctrl-single,pins = < J721E_IOPAD(0x228, PIN_INPUT_PULLUP, 0) /* (Y6) I2C1_SCL */ J721E_IOPAD(0x22c, PIN_INPUT_PULLUP, 0) /* (AA6) I2C1_SDA */ >; }; main_i2c3_pins_default: main-i2c3-pins-default { pinctrl-single,pins = < J721E_IOPAD(0x270, PIN_INPUT_PULLUP, 4) /* (T26) MMC2_CLK.I2C3_SCL */ J721E_IOPAD(0x274, PIN_INPUT_PULLUP, 4) /* (T25) MMC2_CMD.I2C3_SDA */ >; }; main_i2c6_pins_default: main-i2c6-pins-default { pinctrl-single,pins = < J721E_IOPAD(0x1d0, PIN_INPUT_PULLUP, 2) /* (AA3) SPI0_D1.I2C6_SCL */ J721E_IOPAD(0x1e4, PIN_INPUT_PULLUP, 2) /* (Y2) SPI1_D1.I2C6_SDA */ >; }; mcasp10_pins_default: mcasp10_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x158, PIN_OUTPUT_PULLDOWN, 12) /* (U23) RGMII5_TX_CTL.MCASP10_ACLKX */ J721E_IOPAD(0x15c, PIN_OUTPUT_PULLDOWN, 12) /* (U26) RGMII5_RX_CTL.MCASP10_AFSX */ J721E_IOPAD(0x160, PIN_OUTPUT_PULLDOWN, 12) /* (V28) RGMII5_TD3.MCASP10_AXR0 */ J721E_IOPAD(0x164, PIN_OUTPUT_PULLDOWN, 12) /* (V29) RGMII5_TD2.MCASP10_AXR1 */ J721E_IOPAD(0x170, PIN_OUTPUT_PULLDOWN, 12) /* (U29) RGMII5_TXC.MCASP10_AXR2 */ J721E_IOPAD(0x174, PIN_OUTPUT_PULLDOWN, 12) /* (U25) RGMII5_RXC.MCASP10_AXR3 */ J721E_IOPAD(0x198, PIN_INPUT_PULLDOWN, 12) /* (V25) RGMII6_TD1.MCASP10_AXR4 */ J721E_IOPAD(0x19c, PIN_INPUT_PULLDOWN, 12) /* (W27) RGMII6_TD0.MCASP10_AXR5 */ J721E_IOPAD(0x1a0, PIN_INPUT_PULLDOWN, 12) /* (W29) RGMII6_TXC.MCASP10_AXR6 */ >; }; audi_ext_refclk2_pins_default: audi_ext_refclk2_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x1a4, PIN_OUTPUT, 3) /* (W26) RGMII6_RXC.AUDIO_EXT_REFCLK2 */ >; }; main_mmc1_pins_default: main_mmc1_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x254, PIN_INPUT, 0) /* (R29) MMC1_CMD */ J721E_IOPAD(0x250, PIN_INPUT, 0) /* (P25) MMC1_CLK */ J721E_IOPAD(0x2ac, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */ J721E_IOPAD(0x24c, PIN_INPUT, 0) /* (R24) MMC1_DAT0 */ J721E_IOPAD(0x248, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */ J721E_IOPAD(0x244, PIN_INPUT, 0) /* (R25) MMC1_DAT2 */ J721E_IOPAD(0x240, PIN_INPUT, 0) /* (R26) MMC1_DAT3 */ J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */ J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */ >; }; vdd_sd_dv_alt_pins_default: vdd_sd_dv_alt_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x1d8, PIN_INPUT, 7) /* (W4) SPI1_CS1.GPIO0_117 */ >; }; main_usbss0_pins_default: main_usbss0_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */ J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */ >; }; main_usbss1_pins_default: main_usbss1_pins_default { pinctrl-single,pins = < J721E_IOPAD(0x214, PIN_OUTPUT, 4) /* (V4) MCAN1_TX.USB1_DRVVBUS */ >; }; }; &wkup_pmx0 { sw11_button_pins_default: sw11_button_pins_default { pinctrl-single,pins = < J721E_WKUP_IOPAD(0xcc, PIN_INPUT, 7) /* (G28) WKUP_GPIO0_7 */ >; }; mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default { pinctrl-single,pins = < J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */ J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */ J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */ J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */ J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */ J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */ J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */ J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */ >; }; }; &wkup_pmx0 { mcu_cpsw_pins_default: mcu_cpsw_pins_default { pinctrl-single,pins = < J721E_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */ J721E_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */ J721E_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */ J721E_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */ J721E_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */ J721E_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */ J721E_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */ J721E_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */ J721E_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */ J721E_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */ J721E_WKUP_IOPAD(0x0070, PIN_INPUT, 0) /* MCU_RGMII1_TXC */ J721E_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* MCU_RGMII1_RXC */ >; }; mcu_mdio_pins_default: mcu_mdio1_pins_default { pinctrl-single,pins = < J721E_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* MCU_MDIO0_MDC */ J721E_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* MCU_MDIO0_MDIO */ >; }; }; &wkup_uart0 { /* Wakeup UART is used by System firmware */ status = "disabled"; }; &main_uart0 { power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>; }; &main_uart3 { /* UART not brought out */ status = "disabled"; }; &main_uart5 { /* UART not brought out */ status = "disabled"; }; &main_uart6 { /* UART not brought out */ status = "disabled"; }; &main_uart7 { /* UART not brought out */ status = "disabled"; }; &main_uart8 { /* UART not brought out */ status = "disabled"; }; &main_uart9 { /* UART not brought out */ status = "disabled"; }; &main_gpio0 { p127 { gpio-hog; gpios = <127 GPIO_ACTIVE_HIGH>; output-low; line-name = "MCAN2_STB"; }; }; &main_gpio2 { status = "disabled"; }; &main_gpio3 { status = "disabled"; }; &main_gpio4 { status = "disabled"; }; &main_gpio5 { status = "disabled"; }; &main_gpio6 { status = "disabled"; }; &main_gpio7 { status = "disabled"; }; &wkup_gpio1 { status = "disabled"; }; &mailbox0_cluster0 { interrupts = <436>; mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { ti,mbox-rx = <2 0 0>; ti,mbox-tx = <3 0 0>; }; }; &mailbox0_cluster1 { interrupts = <432>; mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { ti,mbox-rx = <2 0 0>; ti,mbox-tx = <3 0 0>; }; }; &mailbox0_cluster2 { interrupts = <428>; mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 { ti,mbox-rx = <2 0 0>; ti,mbox-tx = <3 0 0>; }; }; &mailbox0_cluster3 { interrupts = <424>; mbox_c66_0: mbox-c66-0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; mbox_c66_1: mbox-c66-1 { ti,mbox-rx = <2 0 0>; ti,mbox-tx = <3 0 0>; }; }; &mailbox0_cluster4 { interrupts = <420>; mbox_c71_0: mbox-c71-0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; }; &mailbox0_cluster5 { status = "disabled"; }; &mailbox0_cluster6 { status = "disabled"; }; &mailbox0_cluster7 { status = "disabled"; }; &mailbox0_cluster8 { status = "disabled"; }; &mailbox0_cluster9 { status = "disabled"; }; &mailbox0_cluster10 { status = "disabled"; }; &mailbox0_cluster11 { status = "disabled"; }; &mcu_r5fss0_core0 { mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; }; &mcu_r5fss0_core1 { mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; }; &main_r5fss0_core0 { mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; }; &main_r5fss0_core1 { mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; }; &main_r5fss1_core0 { mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; }; &main_r5fss1_core1 { mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; }; &c66_0 { mboxes = <&mailbox0_cluster3 &mbox_c66_0>; }; &c66_1 { mboxes = <&mailbox0_cluster3 &mbox_c66_1>; }; &c71_0 { mboxes = <&mailbox0_cluster4 &mbox_c71_0>; }; &ospi1 { pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi1_pins_default>; flash@0{ compatible = "jedec,spi-nor"; reg = <0x0>; spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; spi-max-frequency = <40000000>; cdns,tshsl-ns = <60>; cdns,tsd2d-ns = <60>; cdns,tchsh-ns = <60>; cdns,tslch-ns = <60>; cdns,read-delay = <2>; #address-cells = <1>; #size-cells = <1>; }; }; &tscadc0 { adc { ti,adc-channels = <0 1 2 3 4 5 6 7>; }; }; &tscadc1 { adc { ti,adc-channels = <0 1 2 3 4 5 6 7>; }; }; &dss { status = "ok"; }; &dss_ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; dpi_out_real0: endpoint { remote-endpoint = <&dp_bridge_input>; }; }; }; &mhdp { status = "ok"; pinctrl-names = "default"; pinctrl-0 = <&dp0_pins_default>; }; &dp0_ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; dp_bridge_input: endpoint { remote-endpoint = <&dpi_out_real0>; }; }; port@1 { reg = <1>; dp_bridge_output: endpoint { remote-endpoint = <&dp_connector_in>; }; }; }; &main_i2c0 { pinctrl-names = "default"; pinctrl-0 = <&main_i2c0_pins_default>; clock-frequency = <400000>; exp1: gpio@20 { compatible = "ti,tca6416"; reg = <0x20>; gpio-controller; #gpio-cells = <2>; }; exp2: gpio@22 { compatible = "ti,tca6424"; reg = <0x22>; gpio-controller; #gpio-cells = <2>; p06 { /* P06 - MCAN0_EN */ gpio-hog; gpios = <6 GPIO_ACTIVE_HIGH>; output-high; line-name = "MCAN0_EN"; }; p07 { /* P07 - MCAN0_STB# */ gpio-hog; gpios = <7 GPIO_ACTIVE_HIGH>; output-high; line-name = "MCAN0_STB#"; }; p13 { /* P13 - MLB_MUX_SEL */ gpio-hog; gpios = <11 GPIO_ACTIVE_HIGH>; output-low; line-name = "MLB_MUX_SEL"; }; p14 { /* P14 - MCAN_MUX_SEL */ gpio-hog; gpios = <12 GPIO_ACTIVE_HIGH>; output-low; line-name = "MCAN_MUX_SEL"; }; p09 { /* P11 - MCASP/TRACE_MUX_S0 */ gpio-hog; gpios = <9 GPIO_ACTIVE_HIGH>; output-low; line-name = "MCASP/TRACE_MUX_S0"; }; p10 { /* P12 - MCASP/TRACE_MUX_S1 */ gpio-hog; gpios = <10 GPIO_ACTIVE_HIGH>; output-high; line-name = "MCASP/TRACE_MUX_S1"; }; }; }; &main_i2c1 { pinctrl-names = "default"; pinctrl-0 = <&main_i2c1_pins_default>; clock-frequency = <400000>; exp4: gpio@20 { compatible = "ti,tca6408"; reg = <0x20>; gpio-controller; #gpio-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&main_i2c1_exp4_pins_default>; interrupt-parent = <&main_gpio1>; interrupts = <11 IRQ_TYPE_EDGE_FALLING>; interrupt-controller; #interrupt-cells = <2>; p0 { /* P0 - DP0_PWR_SW_EN */ gpio-hog; gpios = <0 GPIO_ACTIVE_HIGH>; output-high; line-name = "DP0_PWR_SW_EN"; }; }; }; &k3_clks { /* Confiure AUDIO_EXT_REFCLK2 pin as output */ pinctrl-names = "default"; pinctrl-0 = <&audi_ext_refclk2_pins_default>; }; &main_i2c3 { pinctrl-names = "default"; pinctrl-0 = <&main_i2c3_pins_default>; clock-frequency = <400000>; exp3: gpio@20 { compatible = "ti,tca6408"; reg = <0x20>; gpio-controller; #gpio-cells = <2>; }; pcm3168a_1: audio-codec@44 { compatible = "ti,pcm3168a"; reg = <0x44>; #sound-dai-cells = <1>; reset-gpios = <&exp3 0 GPIO_ACTIVE_LOW>; /* C_AUDIO_REFCLK2 -> RGMII6_RXC (W26) */ clocks = <&k3_clks 157 371>; clock-names = "scki"; /* HSDIV3_16FFT_MAIN_4_HSDIVOUT2_CLK -> REFCLK2 */ assigned-clocks = <&k3_clks 157 371>; assigned-clock-parents = <&k3_clks 157 400>; assigned-clock-rates = <24576000>; /* for 48KHz */ VDD1-supply = <&vsys_3v3>; VDD2-supply = <&vsys_3v3>; VCCAD1-supply = <&vsys_5v0>; VCCAD2-supply = <&vsys_5v0>; VCCDA1-supply = <&vsys_5v0>; VCCDA2-supply = <&vsys_5v0>; }; }; &main_i2c6 { pinctrl-names = "default"; pinctrl-0 = <&main_i2c6_pins_default>; clock-frequency = <400000>; exp5: gpio@20 { compatible = "ti,tca6408"; reg = <0x20>; gpio-controller; #gpio-cells = <2>; }; }; &mcasp10 { #sound-dai-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&mcasp10_pins_default>; op-mode = <0>; /* MCASP_IIS_MODE */ tdm-slots = <2>; auxclk-fs-ratio = <256>; serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 1 1 1 1 2 2 2 0 >; tx-num-evt = <0>; rx-num-evt = <0>; status = "okay"; }; &mcu_cpsw { pinctrl-names = "default"; pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>; cpts { ti,pps = <3 1>; }; }; &davinci_mdio { phy0: ethernet-phy@0 { reg = <0>; ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; }; }; &cpsw_port1 { phy-mode = "rgmii-rxid"; phy-handle = <&phy0>; }; #define TS_OFFSET(pa, val) (0x4 + (pa) * 4) (0x10000 | val) ×ync_router { pinctrl-names = "default"; pinctrl-0 = <&mcu_cpts>; mcu_cpts: mcu_cpts { pinctrl-single,pins = < /* pps [cpts genf1] in17 -> out25 [cpts hw4_push] */ TS_OFFSET(25, 17) >; }; }; &main_sdhci0 { /* eMMC */ non-removable; ti,driver-strength-ohm = <50>; disable-wp; }; &main_sdhci1 { /* SD/MMC */ vmmc-supply = <&vdd_mmc1>; vqmmc-supply = <&vdd_sd_dv_alt>; pinctrl-names = "default"; pinctrl-0 = <&main_mmc1_pins_default>; disable-wp; }; &main_sdhci2 { /* Unused */ status = "disabled"; }; &serdes0 { serdes0_pcie_link: link@0 { reg = <0>; cdns,num-lanes = <1>; #phy-cells = <0>; cdns,phy-type = <PHY_TYPE_PCIE>; resets = <&serdes_wiz0 1>; }; }; &serdes1 { serdes1_pcie_link: link@0 { reg = <0>; cdns,num-lanes = <2>; #phy-cells = <0>; cdns,phy-type = <PHY_TYPE_PCIE>; resets = <&serdes_wiz1 1>, <&serdes_wiz1 2>; }; }; &serdes2 { serdes2_pcie_link: link@0 { reg = <0>; cdns,num-lanes = <2>; #phy-cells = <0>; cdns,phy-type = <PHY_TYPE_PCIE>; resets = <&serdes_wiz2 1>, <&serdes_wiz2 2>; }; }; &pcie0_rc { reset-gpios = <&exp1 6 GPIO_ACTIVE_HIGH>; phys = <&serdes0_pcie_link>; phy-names = "pcie_phy"; num-lanes = <1>; }; &pcie1_rc { reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>; phys = <&serdes1_pcie_link>; phy-names = "pcie_phy"; num-lanes = <2>; }; &pcie2_rc { reset-gpios = <&exp2 20 GPIO_ACTIVE_HIGH>; phys = <&serdes2_pcie_link>; phy-names = "pcie_phy"; num-lanes = <2>; }; &pcie0_ep { phys = <&serdes0_pcie_link>; phy-names = "pcie_phy"; num-lanes = <1>; status = "disabled"; }; &pcie1_ep { phys = <&serdes1_pcie_link>; phy-names = "pcie_phy"; num-lanes = <2>; status = "disabled"; }; &pcie2_ep { phys = <&serdes2_pcie_link>; phy-names = "pcie_phy"; num-lanes = <2>; status = "disabled"; }; &pcie3_rc { status = "disabled"; }; &pcie3_ep { status = "disabled"; }; &usb_serdes_mux { idle-states = <1>, <0>; /* USB0 to SERDES3, USB1 to SERDES1 */ }; &serdes_ln_ctrl { idle-states = <SERDES0_LANE0_PCIE0_LANE0>, <SERDES0_LANE1_PCIE0_LANE1>, <SERDES1_LANE0_PCIE1_LANE0>, <SERDES1_LANE1_PCIE1_LANE1>, <SERDES2_LANE0_PCIE2_LANE0>, <SERDES2_LANE1_PCIE2_LANE1>, <SERDES3_LANE0_USB3_0_SWAP>, <SERDES3_LANE1_USB3_0>, <SERDES4_LANE0_EDP_LANE0>, <SERDES4_LANE1_EDP_LANE1>, <SERDES4_LANE2_EDP_LANE2>, <SERDES4_LANE3_EDP_LANE3>; }; &serdes_wiz3 { typec-dir-gpios = <&main_gpio1 3 GPIO_ACTIVE_HIGH>; typec-dir-debounce-ms = <700>; /* TUSB321, tCCB_DEFAULT 133 ms */ }; &serdes3 { serdes3_usb_link: link@0 { reg = <0>; cdns,num-lanes = <2>; #phy-cells = <0>; cdns,phy-type = <PHY_TYPE_USB3>; resets = <&serdes_wiz3 1>, <&serdes_wiz3 2>; }; }; &usbss0 { pinctrl-names = "default"; pinctrl-0 = <&main_usbss0_pins_default>; ti,vbus-divider; }; &usb0 { dr_mode = "otg"; maximum-speed = "super-speed"; phys = <&serdes3_usb_link>; phy-names = "cdns3,usb3-phy"; }; &usbss1 { pinctrl-names = "default"; pinctrl-0 = <&main_usbss1_pins_default>; ti,usb2-only; }; &usb1 { dr_mode = "host"; maximum-speed = "high-speed"; }; /* uart2 assigned to cpsw9g eth-switch fw running on remote CPU core */ &main_uart2 { status = "disabled"; };