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Frequent questions

  • [FAQ] AM623: Power-Up Sequencing for VPP?

    Part Number: AM623 Tool/software: Hi Expert, Power-Up Sequencing refers to the datasheet to set up, but now I have a question about the power-up timing of the VPP voltage. And the Figure 7-5. Power-Up Sequencing graphic shows Hi-Z. I don’t quite…

  • [FAQ] AM64x/AM243 : How to enable SYSFW trace on AM64x/AM243 devices

    Part Number: AM6412 Tool/software: In AM64x/AM243 devices, we are using DMSC core (M3 core) for doing Resets, individual core Reset, SOC Reset, Core or IP frequency settings and resource allocation and security operations . We need to use SCI client…

  • [FAQ] TDA4VH-Q1: Achieving Functional Safety with Boot

    Part Number: TDA4VH-Q1 Tool/software: Provide the steps to integrate SDL functional safety modules such as BIST, POK, VTM and TOG with the PDK Boot Application.

  • [FAQ] AM62A3: CPSW3G RGMII phy-less interface to external switch

    Part Number: AM62A3 Tool/software: Hi, a customer is using the AM62A and connects to an external ethernet switch with the RGMII interface. We are looking at the appnote https://www.ti.com/lit/an/sprad07/sprad07.pdf The design currently does…

  • [FAQ] AM625: What's the purpose for the pull down R on MMC_CLK?

    Part Number: AM625 Tool/software: Dear Sir, May I know what the purpose for the pull down R on MMC_CLK signal on TI EVM?

  • [FAQ] TDA4VM: How do we avoid UDMA resource conflict issues when integrating the MCAL Eth module with other modules?

    Part Number: TDA4VM Other Parts Discussed in Thread: SYSCONFIG Tool/software: How do we avoid UDMA resource conflict issues when integrating the MCAL Eth module with other modules?

  • [FAQ] TDA4VH: How do we enable all eight(8) external ports of CPSW9G in TDA4VH using TI EVM?

    Part Number: TDA4VH Tool/software: How do we enable all eight(8) external ports of CPSW9G in TDA4VH using TI EVM?

  • [FAQ] TDA4VM: How do I resolve these compilation errors when building PDK examples?

    Part Number: TDA4VM Tool/software: I am trying to resolve the following errors when attempting to build examples within the RTOS PDK. How can I resolve these errors? SDK: 9.0+ Error Log 1: ti/ti-processor-sdk-rtos-j721e-evm-09_02_00_05/pdk_jacinto_09_02_00_30…

  • [FAQ] TDA4VM: Issues with Cascaded Timer feature

    Part Number: TDA4VM Tool/software: Hi, The timer module in TDA4x devices provides an option to cascade the timers. Each odd numbered timer instance from each of the domain may be optionally cascaded with previous even numbered timer instance for the…

  • [FAQ] TDA4VH-Q1: How to configure the Wave521CL VPU clock? (Linux)

    Part Number: TDA4VH-Q1 Tool/software: I am trying to configure the VPU clock, what information is relevant to doing so?

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