Texas Instruments (TI) Processors support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search processors content or ask technical support questions on Sitara™ processors, digital signal processors (DSP) and automotive processors. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions

  • [FAQ] J784S4XEVM: Trace and its Usage

    Part Number: J784S4XEVM Other Parts Discussed in Thread: ENERGYTRACE Hi Team, How to utilize Trace and EnergyTrace in Code Composer Studio.

  • [FAQ] TDA4VH-Q1: What Jacinto devices support UFS?

    Part Number: TDA4VH-Q1 Other Parts Discussed in Thread: DRA821 , TDA4VM , DRA829 , TDA4VL , TDA4VH What devices within the Jacinto family support interfacing with UFS devices?

  • [FAQ] AM2434: Custom Flash Attach Database

    Part Number: AM2434 The tables below highlight the working configurations of custom OSPI and QSPI serial NOR/NAND Flash Parts Note: After using the values for the Flash part present in the below tables, run the OSPI Flash IO example to verify if Flash…

  • [FAQ] AM2434: Understanding UART Uniflash and OSPI Flash Programming

    Part Number: AM2434 Other Parts Discussed in Thread: UNIFLASH , SYSCONFIG uart_uniflash.py allows to flash binaries to the flash on a EVM. UART is used as the transport or interface to send the file to flash to the EVM. When the uart_uniflash.py script…

  • [FAQ] AM2434: Not able to run load_dmsc_hsfs.js script provided with the MCU+SDK

    Part Number: AM2434 Facing issues while running the loadJSFile command from the CCS scripting console. Please refer image below. I am using the CCS v20.4.0.

  • [FAQ] AM62P-Q1: PWM period selection issue

    Part Number: AM62P-Q1 Other Parts Discussed in Thread: AM62P Hi Team, we need to use PWM channels but i’d like to ask, are we able to set the ePWM period to 1 second in AM62P? I noticed that the PWM input clock is 250 MHz. Is this adjustable? I…

  • [FAQ] AM6441: Cutdown the cores from default Sciclient binary

    Part Number: AM6441 While running the default Sciclient CCS Init binary on the AM6441 SOC, below error is coming. [MAIN_Cortex_R5_0_0] DMSC Firmware Version 11.0.6--v11.00.06 (Fancy Rat) DMSC Firmware revision 0xb DMSC ABI revision 4.0 [SCICLIENT…

  • [FAQ] AM2434: Understanding QE Bit Configurations for Serial QSPI Flash

    Part Number: AM2434 To enable Quad operations when using QSPI Flash, a QE bit has to be set from the OSPI Controller. Different flash parts have different QE bit configurations.

  • [FAQ] TDA4VH-Q1: How do I migrate from UFS 2.1 to UFS 3.0+ (3.1, 4.1, etc)?

    Part Number: TDA4VH-Q1 UFS 2.1 devices are growing more difficult to purchase, as UFS 2.1 was implemented in 2016. I have a UFS 3.0+ device, and I would like to replace the UFS 2.1 device in my design. How do I go about doing that? Are there any changes…

  • [FAQ] Bad Block management in AM64x ROM on GPMC-NAND booting

    Part Number: AM6442 Other Parts Discussed in Thread: TMDS64EVM AM64x boot ROM supports booting from parallel GPMC-NAND. From "4.4.10 GPMC NAND Boot" in AM64x TRM "AM64x ROM only supports boot from ONFI 1.0 compatible 8 bit parallel NAND memory up to…

View FAQ threads
  • Threads 202245 Discussions