Texas Instruments (TI) Processors support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search processors content or ask technical support questions on Sitara™ processors, digital signal processors (DSP) and automotive processors. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions

  • [FAQ] How to update IDs (USB & PCIe PID/VID, MAC ID) by programming extended OTP on AM6x

    There are default ID values for the ID registers of USB, PCIe, MAC as listed in the TRM: - PCIe CTRLMMR_PCI_DEVICE_ID0, CTRLMMR_PCI_DEVICE_ID1 - USB CTRLMMR_USB_DEVICE_ID0, CTRLMMR_USB_DEVICE_ID1 - MAC CTRLMMR_MAC_ID0, CTRLMMR_MAC_ID1 The default ID…

  • [FAQ] How to program the extended OTP efuse on AM6x SoC

    Part Number: PROCESSOR-SDK-AM62A K3 SoC (AM64x, AM62x, AM62A...) have a set of One-Time Programmable (OTP) efuses: 1. The user's secure root key set to support Root-of-Trust (RoT) secure boot 2. The extended OTP efuse for general purpose usage by user…

  • [FAQ] How to generate Linux Appimage for Linux SBLs in MCU+ SDK

    Devices covered: AM64x, AM62x, AM62A The Linux SBLs from the MCU+ SDK support booting the Linux from PSDK. These Linux SBLs require a Linux Appimage to boot the Linux. It is noted that this Linux Appimage is generated using the ATF, OPTEE and A53 U…

  • [FAQ] TDA4VM: How to inference/benchmark on TDA4VM SoC with precompiled model artifacts using edgeai-benchmark repo ?

    Part Number: TDA4VM Hi, How to benchmark Object Detection, Classification and Segmentation models which are part of edgeai-benchmark repos on target SoC ? What KPIs are supported for benchmarking model on target SoC ? Thanks for the help.

  • [FAQ] AM623: unused pin boundary scan function

    Part Number: AM623 Hi, We don't need CSI in our design and from the AM62x Schematic Review Checklist: For specific guidance on certain unused pins, see the Pin Connectivity requirements section in the AM62x Sitara Processors Data Sheet. We see…

  • [FAQ] Sitara MPU Hardware Applications Support - Schematics review request

    Other Parts Discussed in Thread: AM62L Hi TI Experts, I have a customer schematic for review. Could you help me understand the below: 1. Can i share the schematics for review over E2E 2. If not, help me understand the Schematics review request process…

  • [FAQ] AM625: How to boot with eMMC boot mode on AM62x

    Part Number: AM625 This FAQ shows how to boot with eMMC boot mode on AM62x. Due to some recent issues with eMMC boot mode on AM62x such as: - Error flashing the rootfs to eMMC UDA partition in Linux kernel - Error booting from eMMC hardware boot0 partition…

  • [FAQ] TDA4VM: How to port MCAL Ethernet Virtual Mac Application supported on MCU2_1 to MCU1_0?

    Part Number: TDA4VM How to port MCAL Ethernet Virtual Mac Application supported on MCU2_1 to MCU1_0?

  • [FAQ] TDA4VM: TDA4VL : Can you list out the difference of features supported in SDK's for CDD IPC and PDK IPC ?

    Part Number: TDA4VM Hello, Can you list out the difference of supported features in CDD IPC and PDK IPC based on SDK versions ? Regards Tarun Mukesh

  • [FAQ] AM6442: GPIO Input Interrupt Sciclient config failed in MCU PLUS SDK Version 6.0 & above

    Part Number: AM6442 Hi, There is a concern around running GPIO Input Interrupt MCU PLUS SDK example on AM64x. One might get an error message saying: MAIN_Cortex_R5_0_0] [Error] Sciclient event config failed!!! ASSERT: 0.12970s: syscfg/ti_drivers_config…

View FAQ threads
  • Threads 197892 Discussions