Tool/software:
Hi.
I am working with AFE7950EVM and TI JESD IP at Vivado 2021.1.
The example I am referring to is "ZCU102_AFE79XX_8b10b_10Gbps".
My goal is to change parameter(Line Rate 9.8Gbps, LMFS 8421, RXTX) in the example to (Line Rate 10Gbps, LMFS 4841, TX).
I changed jesd_link_params.vh, TI_204c_IP_ref.sv and etc
NUMBER_OF_R/TX_LANES 8 -> 4
NUMBER_OF_QUADS 2-> 1
LANE_ADC/DAC_TO_GT_MAP {4,5,6,7,3,0,2,1,} -> {3,0,2,1}
R/TX_LANE_DATA_WIDTH 64->32
R/TX_F_VAL 2->4
R/TX_K_VAL 32->16
PARAM_TX_M 4->8 in TI_204c_IP.sv
Accordingly, sys_pll, gth_8b10b_xcvr and xdc were modified.
However, during the bitgeneration process, an error as shown in the attached image occurs
what should i do to fix it
Regards
