Frequent Questions

  • [FAQ] ADC128S102-SEP: Power on / off (up / down) sequencing requirements

    Part Number: ADC128S102-SEP In the datasheet, it is mentioned that analog power rail should ramp before digital power rail during power up. What about during power down? Is there guidance about proper sequencing? Should digital power rail ramp down…

  • [FAQ] How to get started with Inductive Touch Buttons

    I want to use inductive sensing for a touch button application but don't know where to start. What resources are available to help with this application?

  • [FAQ] TMAG5110: How are Hall-effect sensors used in motorized window blinds?

    Part Number: TMAG5110 Other Parts Discussed in Thread: DRV5012 , , TMAG5111 Traditional window blinds are used to shade buildings by blocking the light coming through the windows. By placing a barrier between the window and the rest of the building, it…

  • [FAQ] AM2432: AM2x - Boot pins pull down/up requirements

    Part Number: AM2432 Hi TI Experts, This is regarding the boot pins configuration requirements. We want to know if we need explicit pull down or pull up resistor for all boot pins? We want to use QSPI(4S) boot mode and set all boot pin to 0. Do we…

  • [FAQ] TDA4VM: Booting MCU2_1 application form SBL

    Part Number: TDA4VM Hi, Section “6.3.3.2” of TDA4VM TRM states: “ In split mode, each R5F core works completely independent from the other (asymmetric multi-processing, or AMP). Each core uses its own RAMs and interfaces, with no coherence between…

  • [FAQ] 66AK2H12: UART examples for K2H EVM in DSP core

    Part Number: 66AK2H12 How to run UART examples in TI-RTOS SDK for K2H EVM in CCS?

  • [FAQ] Sitara multicore system design: How to ensure computations occur within a set cycle time?

    Part Number: AM6442 I am designing a system with a Sitara multicore device (e.g., AM24x, AM64x, AM65x). The processor needs to complete certain activities within a set cycle time. How do I design my system to make sure that I can meet that cycle time…

  • [FAQ] TPS6594-Q1: TPS6594-Q1, LP8764-Q1: Can TI create a custom program according to customer use?

    Part Number: TPS6594-Q1 Other Parts Discussed in Thread: LP8764-Q1 , TPS6593-Q1 , This applies to TPS6593-Q1, TPS6594-Q1, LP8764-Q1, LP876x: The Scalable PMIC's require an Non-Volatile Memory program to be fit into any application, and it is meant…

  • [FAQ] TPS6594-Q1: TPS6594-Q1, LP8764, LP876x: Can LDOVINT and LDOVRTC be used to power small Loads?

    Part Number: TPS6594-Q1 Other Parts Discussed in Thread: TPS6593-Q1 , This thread applies to TPS6593-Q1, TPS6594-Q1, LP8764, LP876x: LDOVINT and LDOVRTC pins are externally accessible outputs for internal LDOs. It might be tempting to use these…

  • [FAQ] 66AK2H12: Target configuration in CCS for K2H

    Part Number: 66AK2H12 Other Parts Discussed in Thread: 66AK2H14 , How to create target configuration K2H(66AK2H12, 66AK2H12 and 66AK2H14) EVM in CCS?

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