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THS1206 ADC not functioning in full scale

Other Parts Discussed in Thread: THS1206


We are using THS1206 for data acquisition.
Data acqusition is happening well when input is given from function generator i.e. 1.5V to 3.5V.

But, when input is given from the actual source of interest, ADC is not functioning in full range.
i.e not giving the digitalized data corresponding to 2v i.e. from 1.5V to 3.5V ( 0 to 4096 ).
Getting digitalized data corresonding to 1V ( even though 2v signal ranging from 1.5v to 3.5v is given as input ).
That too, base line also is shifting from 2.5V to approaximately 1.8v.

What can be the reason?

I would like to have effective data conversion for 2V.
Base line shall be at 2.5v.

Pl suggest what precautions and changes have to be made to get full scale & to get base line at 2.5v.

  • Hello Latha,

    Can you share the front end amplifier circuit which interfaces the input to THS1206?

    Thanks & Regards,
    Shridhar.
  • Hello Sir

    We have uploaded the design.

    Thanks
    K Lakshmi Latha
  • Hello Latha,

    Thanks for sharing the design. We are looking at it & we will get back to you at the earliest.

    Please help us with following additional information.

    1. When you test with signal generator, does it also generate 300mV signal along with +/-10V pick up pulse, or you are feeding only the 300mV signal from the signal generator. Also, the signal passed through the clipper, gain stage & attenuator for signal generator input as well.
    2. Opamp U7 has both feedback resistances as 0 ohm. I am not sure how gain of 8 is achieved.
    3. Opamp U7 has supply as +5V and gain of 8. With +/-1V pick up, it will get saturated. Please confirm if this is the case.
    4. What happens if you feed clipped signal directly to the DC level shifter circuit?
    5. If you connect the input to GND, what is the measured voltage at the output of U10.
    6. Please confirm if the jumper W1 is installed.

    Thanks & Regards,
    Shridhar.
  • Hello Sir,

    Thank You very much for the reply.

    point wise Information is given below:

    1. Test signal applied from function generator is only 300mv ramp signal.
    But actual source of input is 300mv along with +/- 10v signal.
    Yes. The Function generator signal is passed through the clipper, gain stage & attenuator  as well.

    2. U7 feedback resistors R20 is an adjustable pot of 100K and R21 is 10K
    3. With +/-1V pick up, getting saturated 5V signal. Later by adjusting VR7 bringing the voltage levels of pick up pulse and actual signal of intrest in the range of +/-1V(2V).
    4. We have not tested this case with actual signal. We will check and inform you.
    5. When clipped signal directly fed to the DC level shifter circuit, 2.8v is applied as input to ADC
    6. Jumper W1 is installed

    After applying actual signal, base line is shifting slowly from 2.5V to 1.8v and full scale is confined between
    1.8v to 2.8v

  • Hello Latha,

    Please confirm the REFOUT & REFIN stay constant at 2.5V when you observe the baseline shifting.

    Based on the discussion so far, it appears the ADC may not be the issue, but the driving circuit is causing the issue.

    Since you do not observe the issue with signal generator, the only difference is the pick up pulse which is saturating U7.

    If possible can this pick up pulse be filtered out with LPF & then the signal processed. Also check what happens if U7 gain is kept as 1 & the signal fed to ADC through U10 do you still observe baseline shift.

    If possible please share how the input waveform looks with +/-10V pick up pulse. If a model can be created we can perform a TINA TI simulation to check if it is reproducible.

    Thanks & Regards,
    Shridhar.
  • Hello Sir,

    Thank you very much for the reply.

    REFOUT & REFIN stay constant at 2.5V when we observe base line shifting.

    We have used LPF with cut off frequency of 80Khz. But, no difference.

    Can you please elaborate in what way LPF can be helpful in solving this and what shall be the cut off frequency?

    We will check the output & get back to you, with U7 gain kept at 1 .

    Please find below the attached input waveform. 

    Thanks & Regards

    K Latha

  • Hello Sir,

    For creation of model, uploaded file is OK or do we have to send it in any other format?

    After connecting the clipper output directly to level shifter circut, base line is set at 2.2v. Input signal along with pick up pulse data is captured and displayed between 1.7v to 2.6v.

    How U7 saturation is effecting the ADC conversion?

    But still some times, little difference is found in the captured data i.e. captured data display is not smooth(we can say once in 10 times).

    Please suggest us what has to be done to get smooth waveform.

    1. How to protect ADC from sudden spikes which may cross 1.5v / 3.5v?

    2. We have seen the document slaa593.pdf written by you. In that mentioned to use clamp diodes. Based on the nature of our input signal, can we use zener diodes IN4148 for this purpose or do we have to implement Operational amplifiiers with output clamp by using the same BOM as suggested in the same document.

    Based on the nature of the input signal, Please suggest what hardware has to be implemented so that we will be able to get proper conversion of ADC.

    Your suggestions are very much heplful for us to resolve the issue as well as to have the clarity.

    Thanks & Regards

    K Latha

  • Hello Latha,

    I am trying to create a waveform model but may take time as I do not have correct mathematical model for the same.

    The U7 bypass experiment points to opamp saturation creating some kind of issue. This may be due to time taken by amp to come out of saturation. Just to varify the same, you can pass the clipped signal through U7 with gain programmed as 1 or 2. This will not saturate the U7. With this if you do not observe baseline change, it will confirm the issue is due to saturation.

    The ADC does not have any issues. It is converting what it receives at the input.

    ADC protection
    You need to use schottkey diodes with turn ON voltage <0.3V. 1N4148 has higher turn ON voltage.
    ADC will not get damaged until the input is between AGND to AVDD supply. For voltage outside 1.5V/3.5V you will get saturated code for your configuration.

    According to me, the pick up pulse frequency is very high as compared to the actual signal. It will be useful to create a very good low pass filter which will reject the pulse signature before it reaches your amplifier circuits. This should help.

    I am not sure regarding the intermittent captured data not being smooth. Can you please elaborate what is the difference between a good captured data & the other one.

    Thanks & Regards,
    Shridhar.
  • TI.pdf

    Hello Sir,

    It is very much helpful for us if the waveform model is analysed. We have uploaded the captured data and the problems that are being encountered while capturing the data.

    ADC protection
    As per your suggestion, In our next design we will use schottkey diodes with turn ON voltage <0.3V between AINP and REFP as well as AINP and REFM and we need not implement Operational amplifiiers with output clamp. Kindly confirm.

    For voltage outside 1.5V/3.5V you will get saturated code for your configuration.Getting Saturated code for voltage outside 1.5V/3.5V means, Is it 4096 for this 12 bit ADC?

    Thank you very much for your response in resolving the issue. 

    K Latha

  • Hello Latha,

    Unfortunately I am unable to understand the actual voltage seen by the ADC on the input for the waveforms shown in the attached pdf.

    If you want to check if the ADC is working fine, you can feed the test input by enabling the test settings. This will feed the input as VREFP or VREFM or (VREFP+VREFM)/2 based on the settings. Please check if the output code matches the expected value.

    By default the ADC output data format is in 2's complement format. Please take this into account.

    Also, you can connect the input to GND & check what is the input voltage at the ADC input pin. This should be 2.5V. The converted output should be close to code "0" when in 2's complement mode, for straight binary mode, the output code should be code 2048.

    You can feed various DC voltages between +1V to -1V & check how the ADC input voltage & ADC code varies.

    If you can confirm which mode you are accordingly, I can tell what code to expect when the input goes beyond 1.5V or 3.5V.

    Please share all the raw ADC data Vs actual voltage (Input applies & the ADC input voltage) to confirm if the ADC has been damaged.

    Thanks & Regards,
    Shridhar.
  • Hello Sir,

    We are operating the ADC in binary mode only.

    We have concluded that D11 bit data is being received by processor board as 0, when we apply voltages which gives code more than 2047. That is the reason why we are getting the distorted waveform.

    ADC protection
    As per your suggestion, In our next design we will use schottkey diodes STPIL30 with turn ON voltage 0.3V between AINP and REFP as well as AINP and REFM and we need not implement Operational amplifiiers with output clamp. Please confirm the same or suggest the alternative in case of difference.

    Or, is it advisable to implement comparator with some gating methodology, so that pickup pulse will be taken care

    Thank You.

    K Latha

  • Hello Latha,

    Good to know that the D11 capture was the cause & ADC is not damaged.

    The reference pins are not designed to source or sink current. There is no specification regarding the same in datasheet.

    If you have diode connected to REFP & REFM pins, for input voltage spikes it will impact the reference. Please have REF pins diode connection as option, while definitely have diode connection to AVDD & AGND.

    I d not think you need comparator as you will clamp the input with diode based solution. It will be good if the pulse can be eliminated by some form low pass filtering.

    Thanks & Regards,
    Shridhar.