I2C library for MSP430F2274 using USCI_B0

Hi Sri-sri,

Thanks a lot for your piece of code. I have implemented it and it runs fine.

I would like to ask you some additional questions:

1. Why it is necessary to monitor the stop condition: in which circumstances the program may leave LPM0 before a stop condition has been issued?
2. How would you modify your code in order to suppress the generation if I2C stop conditions both in I2CRead and I2CWrite functions when I want to leave the communication channel open for further transactions?
3. I use an I2C EEPROM and between a Write and Read operations, a Delay is necessary (typically 5ms). For that purpose, I have implemented a delay function (source code hereafter) and noticed a conflict when GIE are set when exiting LPM3. Do you know why? 
4. Do you know if a version of SLAA368A for CCS (Using the USI I²C Code Library) is available?
5. When I change UCB0BR0 from 10 to 5, I do not observe a change in SCL frequency (clock system configuration hereafter). It always sticks to around 100kHz. Do you know why?

The Delay function source code is as follows:

void Delay(unsigned int Count)
{
    TACCTL0 &= ~CCIFG;                                // Reset CCIFG Interrupt Flag
    TACCTL0 = CCIE;                                       // TACCR0 interrupt enabled
    TACTL = TASSEL_1 + MC_1;                     // Timer A select, clock source ACLK, count up to TACCR0, activate Interrupt Request
    TACCR0 = Count;                                       // Clock Count/32'768 s, load Capture Compare of Timer A
    __bis_SR_register(LPM3_bits + GIE);       // Enter LPM3, enable interrupts, only TIMERA Interrupt available
}

// Timer A0 interrupt service routine
#pragma vector=TIMERA0_VECTOR
__interrupt void Timer_A(void)
{
    TACCR0 = 0;                                                              // Stop TIMERA
    TACCTL0 &= ~CCIE;                                                 // TACCR0 interrupt disabled
    __bic_SR_register_on_exit(LPM3_bits /*+ GIE*/);     // Exit LPM3: GIE commented because of an interrupt
                                                                                       // conflict with I2C functions (EMe 16.10.2012)
}

The clock system configuration is as follows:

    WDTCTL   = WDTPW + WDTHOLD;                        // Stop WDT
    BCSCTL3 |= (XCAP0 + XCAP1);                        // Set ACLK Capacity to 12.5 pF
    BCSCTL1  = CALBC1_1MHZ;                            // DCO = 1MHz
    DCOCTL   = CALDCO_1MHZ;

Again, thanks for all!

Best regards,

Eric.

Eric MEURVILLE said:

Why it is necessary to monitor the stop condition:

AS I see the code, stop isn't "monitored". The only condition monitored is the NACK.
However, the sending of a stop must be memorized because you have to set the stop before the last transfer is finished (or you'll get an additional transfer). So once teh ISR has noticed that teh transmissiton has to end, and sets stop, it has to note this down so on next interrupt it knows that the stop is already sent and no action needs to be taken and the LPM can be ended.

Eric MEURVILLE said:

suppress the generation if I2C stop conditions both in I2CRead and I2CWrite functions when I want to leave the communication channel open for further transactions?

It is rather uncommon that you send or receive more data later while keeping the I2C busy. I2C is a transaction-based protocol, not a connection-based one. A transaction is initiated and finished. You can compare it with UDP, not with TCP.
I2C is a bus. While a transaction is in progress, the bus is locked for this transaction. So if you start a transaction and then stall it, the bus is locked for anything else. This might work if you only have exactly one master and one slave, but this is an exception and I've never seen it. And not the purpose of a bus.

Eric MEURVILLE said:

noticed a conflict when GIE are set when exiting LPM3. Do you know why? 

It's possible that the I2C functions require GIE set but don't set it themselves.
So if you clear GIE on timer ISR exit, you prohibit the I2C interrupts and the I2C functions stop working.
This is a common problem with using library code: GIE is a shared resource and it isn't managed. So everyone can set and clear it and assume it is set or cleared and cause havoc. It is necessary to understand what it does and why it is set or cleared and when.
It doesn't help much that there are mutiple ways to handle it: __bic/bis_SR, enable/disable_interrupt, etc.

Eric MEURVILLE said:

When I change UCB0BR0 from 10 to 5, I do not observe a change in SCL frequency

Strange. The 'original' code uses 'I2C_400kHz' constant. Well, difficult on 1Mhz SMCLK, as 2.5 isn't a valid value for BR0. :)
However, changing BR0 shoudl change the frequency.
But there is a possible reason: it might be possible that the slave stretches the clock signal by holding SCL low. Or that the clock signal is considered stretched by line capacitance and too weak pullups. The master releases SCL and then monitors the line and delays progress until it is digitally high.

Hi All,

We are considering porting this code that works pretty well onto an MSP430FR5739. Did someone already do that?

Thanks and regards,

Eric.

 

sri-sri said:

Hi Eric,

         I dont know weather MSP430F2274 has a ready made I2C library, but if u r talking about one to make for yourself, TI examples are best one to start.I have made my library for MSP430g2553 have a look here and go!

#include "I2CMaster.h"

volatile uint16_t     I2CNumBytes;
volatile uint16_t    Ack;
volatile uint8_t    *I2CRxBuffer, *I2CTxBuffer;

volatile uint16_t    I2CStop;

void I2CInit( void )
{
    P1SEL |= BIT6 + BIT7;                    // Assign I2C pins to USCI_B0
    P1SEL2|= BIT6 + BIT7;

//    P1OUT |= BIT6 + BIT7;                    // We can enable internal pull-ups
//    P1REN |= BIT6 + BIT7;

    UCB0CTL1 |= UCSWRST;                    // Enable SW reset
    UCB0CTL0 = UCMST + UCMODE_3 + UCSYNC;    // 7-bit addressing, single-master environment, I2C Master, synchronous mode
    UCB0CTL1 = UCSSEL_2 + UCSWRST;            // Use SMCLK, keep SW reset
    UCB0BR0 = I2C_400KHZ;                    // fSCL = SMCLK/UCB0BR1
    UCB0BR1 = 0;
    UCB0I2CIE = UCNACKIE;                    // Enable not-acknowledge interrupt
    UCB0CTL1 &= ~UCSWRST;                    // Clear SW reset, resume operation
    IE2 |= UCB0TXIE + UCB0RXIE;                // Enable TX&RX interrupts
}

uint16_t I2CWrite( uint8_t sladdr , uint8_t *data , uint16_t n )
{
    //
    Ack = 1;                            // Return value
    //
    I2CTxBuffer = data;                    // TX array start address
    I2CNumBytes = n;                      // Update counter
    UCB0I2CSA = sladdr;                  // Slave address (Right justified, bits6-0)
    //
    UCB0CTL1 |= UCTR + UCTXSTT;            // Send I2C start condition, I2C TX mode
    LPM0;                                // Enter LPM0
    //
    while( UCB0CTL1 & UCTXSTP );        // I2C stop condition sent?
    //
    return Ack;
}

uint16_t I2CRead( uint8_t sladdr , uint8_t *data , uint16_t n )
{
    //
    Ack = 1;                        // Return value
    //
    I2CRxBuffer = data;                // Start of RX buffer
    UCB0I2CSA = sladdr;                // Slave address (Right justified, bits6-0)
    //
    UCB0CTL1 &= ~UCTR;                // I2C RX mode
    //
    if( n == 1 )
    {
        I2CNumBytes = 0;                // Update counter
        //
        __disable_interrupt();
        UCB0CTL1 |= UCTXSTT;            // Send I2C start condition, I2C RX mode
        while( UCB0CTL1 & UCTXSTT );    // I2C start condition sent?
        UCB0CTL1 |= UCTXSTP;            // Send I2C stop condition
        I2CStop = 1;                    // I2C stop condition sent
      __enable_interrupt();
    }
    else if( n > 1 )
    {
        I2CStop = 0;                    // I2C stop condition not sent yet
        I2CNumBytes = n - 2;            // Update counter
        UCB0CTL1 |= UCTXSTT;            // Send I2C start condition
    }
    LPM0;                                // Enter LPM0
    //
    while( UCB0CTL1 & UCTXSTP );        // I2C stop condition sent?
    //
    return Ack;
}

#ifdef    I2C_PING
uint16_t I2CPing( uint8_t sladdr )
{
    //
    UCB0I2CSA = sladdr;                      // Slave address (Right justified, bits6-0)
    //
    __disable_interrupt();
    UCB0CTL1 |= UCTR + UCTXSTT + UCTXSTP;    // I2C start condition, I2C TX mode, I2C stop condition
    while( UCB0CTL1 & UCTXSTP );            // I2C stop condition sent?
    Ack = !(UCB0STAT & UCNACKIFG);            // I2C start condition akd'd or not?
    __enable_interrupt();
    //
    return Ack;
}
#endif    /* !I2C_PING */

#pragma vector = USCIAB0TX_VECTOR
__interrupt void USCIAB0TX_ISR(void)
{
     if( IFG2 & UCB0RXIFG )        // RX mode
     {
        if( I2CNumBytes == 0 )
        {
            // I2CStop is used just to make sure that we leave LPM0 at the right time and not
            // before
            if( I2CStop )
            {
                _low_power_mode_off_on_exit( );        // Exit LPM0
            }
            else
            {
                UCB0CTL1 |= UCTXSTP;                // I2C stop condition
                I2CStop = 1;                        // I2C stop condition sent
            }
        }
        else
        {
            I2CNumBytes--;                            // Decrement counter
        }
        *I2CRxBuffer++ = UCB0RXBUF;                    // Read RX data. This automatically clears UCB0RXIFG
     }
     else                        // TX mode
     {
        if( I2CNumBytes )                            // Check counter
        {
            UCB0TXBUF = *I2CTxBuffer++;             // Load TX buffer. This automatically clears UCB0TXIFG
            I2CNumBytes--;                            // Decrement counter
        }
        else
        {
            UCB0CTL1 |= UCTXSTP;                    // I2C stop condition
            IFG2 &= ~UCB0TXIFG;                     // Clear USCI_B0 TX int flag
            _low_power_mode_off_on_exit( );            // Exit LPM0
        }
     }
}

#pragma vector = USCIAB0RX_VECTOR
__interrupt void USCIAB0RX_ISR(void)
{
    // Not-acknowledge interrupt. This flag is set when an acknowledge is expected
    // but is not received. UCNACKIFG is automatically cleared when a START condition
    // is received.
    if( UCB0STAT & UCNACKIFG )
    {
        UCB0CTL1 |= UCTXSTP;            // I2C stop condition
        Ack = 0;                        // Return value
        UCB0STAT &= ~UCNACKIFG;            // Clear interrupt flag
    }

    // Arbitration-lost. When UCALIFG is set the UCMST bit is cleared and the I2C
    // controller becomes a slave. This can only happen in a multimaster environment

    // Start condition detected interrupt. UCSTTIFG only used in slave mode.

    // Stop condition detected interrupt. UCSTPIFG only used in slave mode.

    _low_power_mode_off_on_exit( );        // Exit LPM0
}

Hi

I am working MSP430FR5739 by TI. i am tryng to bring up I2C interface between MSP430 and external acceleromer. Is there any api like I2C write in MSP430FR5739 to configure external accelerometer from the master.. Please help me to solve this issue..

Thanks and regards

Ck

Thanks a lot for your code.

Simply nice.