Hi Kanae,
I forwarded this question to a hardware engineer to see if she can also confirm.
I come mainly from a software background for PCIe, but from software-perspective, as long as the electromechanical specifications are followed, then there should…
Part Number: CDCM9102 Hi team,
When the output clock of CDCM9102 is LVPECL level, Voh min (2.12V) is slightly less than VIH min (2.135V) of LVPECL level of c6678 input interface. Can this be connected directly?
If use CDCE62002 , it should be able to connect…
Part Number: CDCM9102 Hi, CDCM9102 support team,
Customer request to review the schematic using CDCM9102. Can you review their schematic at your viewpoint? If YES, I would like to directly send it to you. Please let me know about your address.
Thanks
T…
Part Number: CDCM9102 Other Parts Discussed in Thread: LMK00334 , CDCE6214-Q1 Hello team,
I'm looking for zero delay clock buffer device with dual HCSL outputs for PCIe. I can find clock generator CDCM9102 but I'd like to know if there is any good clock…
Part Number: CDCM9102 Hi Team,
The datasheet says that CDCM9102 implements a Colpitts Oscillator, is there any special requirements for external crystal?
For example, can we use TXC_8Z crystal oscillator? If so, does it mean that Pin1 should be connected…
Part Number: CDCM61001 Other Parts Discussed in Thread: CDCM9102 1. What is the IO voltage levels for all Pins especially OD, OS, PR pins
2. In datasheet, only XIN pin is mentioned. Please let me know which is XOUT pin to connect the crystal
3. What is…
Part Number: CDCM9102 When OS1=1 and OS2=2, OSCOUT is enabled in LVPECL mode. In this case, what is the performance (Duty, Jiter and so on) of the clock signal from OSCOUT pin?
Thanks
Tamio